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Message-ID: <46b0dbd4-5695-1a2d-8d06-0a60a7c3a151@linaro.org>
Date: Tue, 9 May 2023 08:39:25 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Achal Verma <a-verma1@...com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Bjorn Andersson <quic_bjorande@...cinc.com>,
Arnd Bergmann <arnd@...db.de>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
"N_colas F . R . A . Prado" <nfraprado@...labora.com>,
Mark Brown <broonie@...nel.org>,
Rafa_ Mi_ecki <rafal@...ecki.pl>,
Vignesh Raghavendra <vigneshr@...com>,
Nishanth Menon <nm@...com>, Milind Parab <mparab@...ence.com>,
Swapnil Kashinath Jakhade <sjakhade@...ence.com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: defconfig: enable PCIe controller on TI platforms
On 09/05/2023 08:34, Achal Verma wrote:
> Enable PCIe controller and serdes drivers to enable PCIe functionality.
> * Enable Cadence serdes phy and wrapper driver.
> * Enable Cadence PCIe controller driver.
Why? IOW, which boards needs it?
>
> Signed-off-by: Achal Verma <a-verma1@...com>
> ---
> arch/arm64/configs/defconfig | 15 +++++++++++----
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index a24609e14d50..ff187dd585c2 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -230,9 +230,16 @@ CONFIG_PCIE_HISI_STB=y
> CONFIG_PCIE_TEGRA194_HOST=m
> CONFIG_PCIE_VISCONTI_HOST=y
> CONFIG_PCIE_LAYERSCAPE_GEN4=y
> +CONFIG_PCIE_CADENCE=y
=m
> +CONFIG_PCIE_CADENCE_HOST=y
> +CONFIG_PCIE_CADENCE_EP=y
> +CONFIG_PCI_J721E=y
=m
> +CONFIG_PCI_J721E_HOST=y
> +CONFIG_PCI_J721E_EP=y
> CONFIG_PCI_ENDPOINT=y
> CONFIG_PCI_ENDPOINT_CONFIGFS=y
> CONFIG_PCI_EPF_TEST=m
> +CONFIG_PCI_EPF_NTB=m
> CONFIG_DEVTMPFS=y
> CONFIG_DEVTMPFS_MOUNT=y
> CONFIG_FW_LOADER_USER_HELPER=y
> @@ -1330,8 +1337,8 @@ CONFIG_RESET_TI_SCI=y
> CONFIG_PHY_XGENE=y
> CONFIG_PHY_CAN_TRANSCEIVER=m
> CONFIG_PHY_SUN4I_USB=y
> -CONFIG_PHY_CADENCE_TORRENT=m
> -CONFIG_PHY_CADENCE_SIERRA=m
> +CONFIG_PHY_CADENCE_TORRENT=y
> +CONFIG_PHY_CADENCE_SIERRA=y
Why? Commit msg does not explain it.
> CONFIG_PHY_MIXEL_MIPI_DPHY=m
> CONFIG_PHY_FSL_IMX8M_PCIE=y
> CONFIG_PHY_HI6220_USB=y
> @@ -1363,8 +1370,8 @@ CONFIG_PHY_SAMSUNG_UFS=y
> CONFIG_PHY_UNIPHIER_USB2=y
> CONFIG_PHY_UNIPHIER_USB3=y
> CONFIG_PHY_TEGRA_XUSB=y
> -CONFIG_PHY_AM654_SERDES=m
> -CONFIG_PHY_J721E_WIZ=m
> +CONFIG_PHY_AM654_SERDES=y
> +CONFIG_PHY_J721E_WIZ=y
Why?
> CONFIG_ARM_CCI_PMU=m
> CONFIG_ARM_CCN=m
> CONFIG_ARM_CMN=m
Best regards,
Krzysztof
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