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Message-ID: <ZFo+4hsf4g+BQJm1@kuha.fi.intel.com>
Date: Tue, 9 May 2023 15:38:58 +0300
From: Heikki Krogerus <heikki.krogerus@...ux.intel.com>
To: Prashant Malani <pmalani@...omium.org>
Cc: linux-kernel@...r.kernel.org, chrome-platform@...ts.linux.dev,
bleung@...omium.org
Subject: Re: [PATCH] platform/chrome: cros_typec_switch: Add Pin D support
On Mon, May 08, 2023 at 06:34:27PM +0000, Prashant Malani wrote:
> The ChromeOS EC's mux interface allows us to specify whether the port
> should be configured for Pin Assignment D in DisplayPort alternate mode
> (i.e 2 lanes USB + 2 lanes DP). Update the function that determines mux
> state to account for Pin Assignment D and return the appropriate mux
> setting.
>
> Cc: Heikki Krogerus <heikki.krogerus@...ux.intel.com>
> Signed-off-by: Prashant Malani <pmalani@...omium.org>
Acked-by: Heikki Krogerus <heikki.krogerus@...ux.intel.com>
> ---
> drivers/platform/chrome/cros_typec_switch.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform/chrome/cros_typec_switch.c
> index 752720483753..0eefdcf14d63 100644
> --- a/drivers/platform/chrome/cros_typec_switch.c
> +++ b/drivers/platform/chrome/cros_typec_switch.c
> @@ -51,13 +51,18 @@ static int cros_typec_cmd_mux_set(struct cros_typec_switch_data *sdata, int port
> static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *alt)
> {
> int ret = -EOPNOTSUPP;
> + u8 pin_assign;
>
> - if (mode == TYPEC_STATE_SAFE)
> + if (mode == TYPEC_STATE_SAFE) {
> ret = USB_PD_MUX_SAFE_MODE;
> - else if (mode == TYPEC_STATE_USB)
> + } else if (mode == TYPEC_STATE_USB) {
> ret = USB_PD_MUX_USB_ENABLED;
> - else if (alt && alt->svid == USB_TYPEC_DP_SID)
> + } else if (alt && alt->svid == USB_TYPEC_DP_SID) {
> ret = USB_PD_MUX_DP_ENABLED;
> + pin_assign = mode - TYPEC_STATE_MODAL;
> + if (pin_assign & DP_PIN_ASSIGN_D)
> + ret |= USB_PD_MUX_USB_ENABLED;
> + }
>
> return ret;
> }
thanks,
--
heikki
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