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Message-Id: <20230509125812.310307-2-ojeda@kernel.org>
Date: Tue, 9 May 2023 14:58:12 +0200
From: Miguel Ojeda <ojeda@...nel.org>
To: Miguel Ojeda <ojeda@...nel.org>
Cc: Jason Gunthorpe <jgg@...dia.com>, linux-kernel@...r.kernel.org,
patches@...ts.linux.dev
Subject: [PATCH 2/2] clang-format: expand `ForEach` list to the entire tree
Some developers would like to see their internal `for_each` macros
(i.e. including C source files in non-`include/` folders) also
handled by `clang-format` [1], thus enable it for the entire tree.
As a result, the list doubles in size, from ~600 to ~1200 lines.
Link: https://lore.kernel.org/all/ZCWcd5FkGhpYhCUi@nvidia.com/ [1]
Signed-off-by: Miguel Ojeda <ojeda@...nel.org>
---
.clang-format | 601 +++++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 600 insertions(+), 1 deletion(-)
diff --git a/.clang-format b/.clang-format
index 20969c66fec7..649727e1d293 100644
--- a/.clang-format
+++ b/.clang-format
@@ -65,7 +65,7 @@ ExperimentalAutoDetectBinPacking: false
FixNamespaceComments: false
# Taken from:
-# git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ tools/ \
+# git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' \
# | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$, - '\1'," \
# | LC_ALL=C sort -u
ForEachMacros:
@@ -77,10 +77,14 @@ ForEachMacros:
- '__evlist__for_each_entry_from'
- '__evlist__for_each_entry_reverse'
- '__evlist__for_each_entry_safe'
+ - '__for_each_child_of_node'
- '__for_each_mem_range'
- '__for_each_mem_range_rev'
+ - '__for_each_sgt_daddr'
+ - '__for_each_tdp_mmu_root_yield_safe'
- '__for_each_thread'
- '__hlist_for_each_rcu'
+ - '__labelset_for_each'
- '__map__for_each_symbol_by_name'
- '__pci_bus_for_each_res0'
- '__pci_bus_for_each_res1'
@@ -92,14 +96,25 @@ ForEachMacros:
- '__rq_for_each_bio'
- '__shost_for_each_device'
- '__sym_for_each'
+ - '__usbhs_for_each_pipe'
+ - '__usbhsg_for_each_uep'
+ - '__usbhsh_for_each_udev'
+ - '__wq_list_for_each'
+ - '_rcu_for_each_node_breadth_first'
+ - 'amdgpu_bo_list_for_each_entry'
+ - 'amdgpu_bo_list_for_each_userptr_entry'
- 'apei_estatus_for_each_section'
+ - 'at91_for_each_port'
- 'ata_for_each_dev'
- 'ata_for_each_link'
- 'ata_qc_for_each'
- 'ata_qc_for_each_raw'
- 'ata_qc_for_each_with_internal'
+ - 'ath_for_each_chanctx'
- 'ax25_for_each'
- 'ax25_uid_for_each'
+ - 'b53_for_each_port'
+ - 'binder_for_each_debugfs_entry'
- 'bio_for_each_bvec'
- 'bio_for_each_bvec_all'
- 'bio_for_each_folio_all'
@@ -108,6 +123,9 @@ ForEachMacros:
- 'bio_for_each_segment_all'
- 'bio_list_for_each'
- 'bip_for_each_vec'
+ - 'blk_queue_for_each_rl'
+ - 'blkg_for_each_descendant_post'
+ - 'blkg_for_each_descendant_pre'
- 'bond_for_each_slave'
- 'bond_for_each_slave_rcu'
- 'bpf__perf_for_each_map'
@@ -118,22 +136,34 @@ ForEachMacros:
- 'bpf_object__for_each_map'
- 'bpf_object__for_each_program'
- 'bpf_perf_object__for_each'
+ - 'bpf_rbtree_postorder_for_each_entry_safe'
- 'btree_for_each_safe128'
- 'btree_for_each_safe32'
- 'btree_for_each_safe64'
- 'btree_for_each_safel'
+ - 'btrfs_for_each_slot'
+ - 'btrfs_lru_cache_for_each_entry_safe'
- 'card_for_each_dev'
+ - 'carl9170fw_for_each_hdr'
+ - 'cea_db_iter_for_each'
+ - 'cgroup_for_each_live_child'
+ - 'cgroup_for_each_live_descendant_post'
+ - 'cgroup_for_each_live_descendant_pre'
- 'cgroup_taskset_for_each'
- 'cgroup_taskset_for_each_leader'
+ - 'chp_id_for_each'
- 'cpu_aggr_map__for_each_idx'
- 'cpufreq_for_each_efficient_entry_idx'
- 'cpufreq_for_each_entry'
- 'cpufreq_for_each_entry_idx'
- 'cpufreq_for_each_valid_entry'
- 'cpufreq_for_each_valid_entry_idx'
+ - 'cpuset_for_each_child'
+ - 'cpuset_for_each_descendant_pre'
- 'css_for_each_child'
- 'css_for_each_descendant_post'
- 'css_for_each_descendant_pre'
+ - 'cxl_for_each_cmd'
- 'damon_for_each_region'
- 'damon_for_each_region_from'
- 'damon_for_each_region_safe'
@@ -143,17 +173,26 @@ ForEachMacros:
- 'damon_for_each_target_safe'
- 'damos_for_each_filter'
- 'damos_for_each_filter_safe'
+ - 'dapm_kcontrol_for_each_path'
- 'data__for_each_file'
- 'data__for_each_file_new'
- 'data__for_each_file_start'
+ - 'devcom_for_each_component'
- 'device_for_each_child_node'
+ - 'devlinks_xa_for_each_registered_get'
+ - 'dfl_fpga_dev_for_each_feature'
- 'displayid_iter_for_each'
- 'dma_fence_array_for_each'
- 'dma_fence_chain_for_each'
- 'dma_fence_unwrap_for_each'
- 'dma_resv_for_each_fence'
- 'dma_resv_for_each_fence_unlocked'
+ - 'do_for_each_event_file'
+ - 'do_for_each_event_file_safe'
- 'do_for_each_ftrace_op'
+ - 'do_for_each_ftrace_rec'
+ - 'double_list_for_each_entry'
+ - 'drbd_for_each_overlap'
- 'drm_atomic_crtc_for_each_plane'
- 'drm_atomic_crtc_state_for_each_plane'
- 'drm_atomic_crtc_state_for_each_plane_state'
@@ -161,6 +200,7 @@ ForEachMacros:
- 'drm_client_for_each_connector_iter'
- 'drm_client_for_each_modeset'
- 'drm_connector_for_each_possible_encoder'
+ - 'drm_edid_iter_for_each'
- 'drm_for_each_bridge_in_chain'
- 'drm_for_each_connector_iter'
- 'drm_for_each_crtc'
@@ -169,6 +209,7 @@ ForEachMacros:
- 'drm_for_each_encoder_mask'
- 'drm_for_each_fb'
- 'drm_for_each_legacy_plane'
+ - 'drm_for_each_lessee'
- 'drm_for_each_plane'
- 'drm_for_each_plane_mask'
- 'drm_for_each_privobj'
@@ -188,6 +229,18 @@ ForEachMacros:
- 'dsa_tree_for_each_user_port_continue_reverse'
- 'dso__for_each_symbol'
- 'dsos__for_each_with_build_id'
+ - 'ebitmap_for_each_positive_bit'
+ - 'eeh_for_each_pe'
+ - 'eeh_pe_for_each_dev'
+ - 'ef4_for_each_channel'
+ - 'ef4_for_each_channel_rev'
+ - 'ef4_for_each_channel_rx_queue'
+ - 'ef4_for_each_channel_tx_queue'
+ - 'ef4_for_each_possible_channel_tx_queue'
+ - 'efx_for_each_channel'
+ - 'efx_for_each_channel_rev'
+ - 'efx_for_each_channel_rx_queue'
+ - 'efx_for_each_channel_tx_queue'
- 'elf_hash_for_each_possible'
- 'elf_symtab__for_each_symbol'
- 'evlist__for_each_cpu'
@@ -196,23 +249,54 @@ ForEachMacros:
- 'evlist__for_each_entry_from'
- 'evlist__for_each_entry_reverse'
- 'evlist__for_each_entry_safe'
+ - 'expr_list_for_each_sym'
+ - 'fbcon_for_each_registered_fb'
+ - 'fdt_for_each_property_offset'
+ - 'fdt_for_each_subnode'
+ - 'fec_for_each_buffer'
+ - 'fec_for_each_buffer_rs_block'
+ - 'fec_for_each_extra_buffer'
+ - 'fec_for_each_prealloc_buffer'
+ - 'fifo_for_each'
- 'flow_action_for_each'
+ - 'fm10k_for_each_ring'
+ - 'fn_for_each'
+ - 'fn_for_each2_XXX'
+ - 'fn_for_each_XXX'
+ - 'fn_for_each_comb'
+ - 'fn_for_each_confined'
+ - 'fn_for_each_in_merge'
+ - 'fn_for_each_in_ns'
+ - 'fn_for_each_not_in_set'
- 'for_each_acpi_consumer_dev'
- 'for_each_acpi_dev_match'
+ - 'for_each_action_of_desc'
+ - 'for_each_active_base'
- 'for_each_active_dev_scope'
- 'for_each_active_drhd_unit'
- 'for_each_active_iommu'
+ - 'for_each_active_policy'
- 'for_each_active_route'
+ - 'for_each_active_vgpu'
- 'for_each_aggr_pgid'
+ - 'for_each_alloc_capable_rdt_resource'
+ - 'for_each_amdgpu_vm_pt_dfs_safe'
- 'for_each_and_bit'
- 'for_each_andnot_bit'
+ - 'for_each_available_cap'
- 'for_each_available_child_of_node'
+ - 'for_each_batch_add_order'
+ - 'for_each_batch_create_order'
- 'for_each_bench'
- 'for_each_bio'
- 'for_each_board_func_rsrc'
- 'for_each_btf_ext_rec'
- 'for_each_btf_ext_sec'
+ - 'for_each_bucket'
+ - 'for_each_buffer_cpu'
- 'for_each_bvec'
+ - 'for_each_cached_btree'
+ - 'for_each_capable_rdt_resource'
- 'for_each_card_auxs'
- 'for_each_card_auxs_safe'
- 'for_each_card_components'
@@ -223,87 +307,249 @@ ForEachMacros:
- 'for_each_card_rtds_safe'
- 'for_each_card_widgets'
- 'for_each_card_widgets_safe'
+ - 'for_each_cbr_in_allocation_map'
+ - 'for_each_cbr_in_tfm'
+ - 'for_each_cfg_sme'
- 'for_each_cgroup_storage_type'
+ - 'for_each_chain_block'
+ - 'for_each_chameleon_cell'
+ - 'for_each_changed_input'
+ - 'for_each_child'
- 'for_each_child_of_node'
+ - 'for_each_child_safe'
+ - 'for_each_child_withdel'
+ - 'for_each_chip_select'
+ - 'for_each_chip_select_mask'
+ - 'for_each_clamp_id'
+ - 'for_each_class'
- 'for_each_clear_bit'
- 'for_each_clear_bit_from'
+ - 'for_each_clear_bit_le'
- 'for_each_clear_bitrange'
- 'for_each_clear_bitrange_from'
+ - 'for_each_cls_flow_id'
+ - 'for_each_cls_flow_id_containing_type'
+ - 'for_each_cls_flow_id_with_type'
- 'for_each_cmd'
+ - 'for_each_cmdbuf_ctx'
- 'for_each_cmsghdr'
+ - 'for_each_cnic_queue'
- 'for_each_collection'
+ - 'for_each_combo_phy'
+ - 'for_each_combo_phy_reverse'
- 'for_each_comp_order'
- 'for_each_compatible_node'
+ - 'for_each_component'
- 'for_each_component_dais'
- 'for_each_component_dais_safe'
- 'for_each_conduit'
+ - 'for_each_connection'
+ - 'for_each_connection_rcu'
+ - 'for_each_connection_safe'
- 'for_each_console'
- 'for_each_console_srcu'
+ - 'for_each_context'
+ - 'for_each_cos_in_tx_queue'
+ - 'for_each_cos_in_txq'
- 'for_each_cpu'
- 'for_each_cpu_and'
- 'for_each_cpu_andnot'
+ - 'for_each_cpu_node_but'
- 'for_each_cpu_or'
+ - 'for_each_cpu_transcoder'
+ - 'for_each_cpu_transcoder_masked'
+ - 'for_each_cpu_worker_pool'
- 'for_each_cpu_wrap'
+ - 'for_each_crtc'
+ - 'for_each_crtc_mask'
+ - 'for_each_crtc_mask_reverse'
+ - 'for_each_css'
- 'for_each_dapm_widgets'
+ - 'for_each_dax_region_resource'
+ - 'for_each_dbuf_slice'
+ - 'for_each_dbuf_slice_in_mask'
- 'for_each_dedup_cand'
+ - 'for_each_desc'
- 'for_each_dev_addr'
- 'for_each_dev_scope'
- 'for_each_dma_cap_mask'
+ - 'for_each_dmc_id'
+ - 'for_each_domain'
+ - 'for_each_dpa_resource'
+ - 'for_each_dpa_resource_safe'
- 'for_each_dpcm_be'
- 'for_each_dpcm_be_rollback'
- 'for_each_dpcm_be_safe'
- 'for_each_dpcm_fe'
- 'for_each_drhd_unit'
+ - 'for_each_drmem_lmb'
+ - 'for_each_drmem_lmb_in_range'
+ - 'for_each_dsi_phy'
+ - 'for_each_dsi_port'
- 'for_each_dss_dev'
+ - 'for_each_dss_output'
+ - 'for_each_dyn_event'
+ - 'for_each_dyn_event_safe'
+ - 'for_each_e_css'
+ - 'for_each_efi_handle'
- 'for_each_efi_memory_desc'
- 'for_each_efi_memory_desc_in_map'
- 'for_each_element'
- 'for_each_element_extid'
- 'for_each_element_id'
+ - 'for_each_encoder_on_crtc'
- 'for_each_endpoint_of_node'
+ - 'for_each_engine'
+ - 'for_each_engine_masked'
+ - 'for_each_entity'
+ - 'for_each_entity_safe'
+ - 'for_each_eth_queue'
+ - 'for_each_ethrxq'
- 'for_each_event'
+ - 'for_each_event_constraint'
- 'for_each_event_tps'
- 'for_each_evictable_lru'
+ - 'for_each_extended_xfeature'
+ - 'for_each_fabric_cfg'
+ - 'for_each_fbc_id'
- 'for_each_fib6_node_rt_rcu'
- 'for_each_fib6_walker_rt'
+ - 'for_each_fl_continue_rcu'
+ - 'for_each_fl_rcu'
- 'for_each_free_mem_pfn_range_in_zone'
- 'for_each_free_mem_pfn_range_in_zone_from'
- 'for_each_free_mem_range'
- 'for_each_free_mem_range_reverse'
+ - 'for_each_frequency'
- 'for_each_func_rsrc'
+ - 'for_each_fw_domain'
+ - 'for_each_fw_domain_masked'
+ - 'for_each_gart_pte'
+ - 'for_each_gem_engine'
+ - 'for_each_gen_type_zone'
+ - 'for_each_gfn_valid_sp_with_gptes'
+ - 'for_each_ggtt_vma'
+ - 'for_each_governor'
+ - 'for_each_governor_table'
+ - 'for_each_gpio_bank'
+ - 'for_each_gpio_desc'
+ - 'for_each_gpio_desc_with_flag'
- 'for_each_gpiochip_node'
- 'for_each_group_evsel'
- 'for_each_group_member'
+ - 'for_each_gru_in_bitmap'
+ - 'for_each_gru_on_blade'
+ - 'for_each_gt'
+ - 'for_each_gts_on_gru'
+ - 'for_each_handle_rcu'
+ - 'for_each_hash_entry'
+ - 'for_each_hda_codec_node'
+ - 'for_each_hist_field'
+ - 'for_each_hist_key_field'
+ - 'for_each_hist_val_field'
+ - 'for_each_host'
+ - 'for_each_host_safe'
+ - 'for_each_hpd_pin'
+ - 'for_each_hrrq'
- 'for_each_hstate'
+ - 'for_each_hw_dn'
+ - 'for_each_hwfn'
+ - 'for_each_ie'
- 'for_each_if'
+ - 'for_each_ilt_valid_client'
+ - 'for_each_imc_pci_id'
+ - 'for_each_inactive_policy'
- 'for_each_inject_fn'
+ - 'for_each_inode'
+ - 'for_each_input_queue'
- 'for_each_insn'
- 'for_each_insn_prefix'
+ - 'for_each_instance'
+ - 'for_each_intel_connector_iter'
+ - 'for_each_intel_crtc'
+ - 'for_each_intel_crtc_in_pipe_mask'
+ - 'for_each_intel_dp'
+ - 'for_each_intel_encoder'
+ - 'for_each_intel_encoder_mask'
+ - 'for_each_intel_encoder_mask_with_psr'
+ - 'for_each_intel_encoder_with_psr'
+ - 'for_each_intel_fbc'
+ - 'for_each_intel_plane'
+ - 'for_each_intel_plane_mask'
+ - 'for_each_intel_plane_on_crtc'
+ - 'for_each_intf'
- 'for_each_intid'
- 'for_each_iommu'
+ - 'for_each_iommu_safe'
+ - 'for_each_iotlb_cr'
+ - 'for_each_ip6_tunnel_rcu'
- 'for_each_ip_tunnel_rcu'
- 'for_each_irq_nr'
+ - 'for_each_irq_pin'
+ - 'for_each_irqts'
+ - 'for_each_isci_host'
+ - 'for_each_key'
+ - 'for_each_key_filter'
+ - 'for_each_kimage_entry'
+ - 'for_each_kmem_cache_node'
+ - 'for_each_l2hash_node'
+ - 'for_each_l3cc'
+ - 'for_each_label'
+ - 'for_each_label_withdel'
- 'for_each_lang'
+ - 'for_each_leaf_cfs_rq_safe'
+ - 'for_each_leaf_node_cpu_mask'
+ - 'for_each_leaf_node_possible_cpu'
- 'for_each_link_codecs'
- 'for_each_link_cpus'
- 'for_each_link_platforms'
+ - 'for_each_link_sta_info'
+ - 'for_each_lpi_its'
- 'for_each_lru'
+ - 'for_each_m4u'
+ - 'for_each_machine_desc'
+ - 'for_each_mapped_pfn'
+ - 'for_each_marker'
+ - 'for_each_marker_of_type'
- 'for_each_matching_node'
- 'for_each_matching_node_and_match'
+ - 'for_each_mc_mclock'
+ - 'for_each_mc_rcu'
+ - 'for_each_mc_tomb'
- 'for_each_media_entity_data_link'
+ - 'for_each_mem_cgroup'
+ - 'for_each_mem_cgroup_tree'
+ - 'for_each_mem_cluster'
- 'for_each_mem_pfn_range'
- 'for_each_mem_range'
- 'for_each_mem_range_rev'
- 'for_each_mem_region'
- 'for_each_member'
+ - 'for_each_member_from'
+ - 'for_each_memblock_type'
- 'for_each_memory'
+ - 'for_each_memory_region'
- 'for_each_migratetype_order'
+ - 'for_each_mips_machine'
- 'for_each_missing_reg'
+ - 'for_each_mixer_elem'
- 'for_each_mle_subelement'
+ - 'for_each_mocs'
- 'for_each_mod_mem_type'
+ - 'for_each_modinfo_entry'
+ - 'for_each_module'
+ - 'for_each_mon_capable_rdt_resource'
+ - 'for_each_mte_vma'
+ - 'for_each_mv'
+ - 'for_each_mvm_vif_valid_link'
+ - 'for_each_napot_order'
+ - 'for_each_napot_order_rev'
+ - 'for_each_nest_rmap_safe'
- 'for_each_net'
- 'for_each_net_continue_reverse'
- 'for_each_net_rcu'
+ - 'for_each_netcp_device_module'
+ - 'for_each_netcp_module'
- 'for_each_netdev'
- 'for_each_netdev_continue'
- 'for_each_netdev_continue_rcu'
@@ -315,6 +561,10 @@ ForEachMacros:
- 'for_each_netdev_safe'
- 'for_each_new_connector_in_state'
- 'for_each_new_crtc_in_state'
+ - 'for_each_new_global_obj_in_state'
+ - 'for_each_new_intel_connector_in_state'
+ - 'for_each_new_intel_crtc_in_state'
+ - 'for_each_new_intel_plane_in_state'
- 'for_each_new_mst_mgr_in_state'
- 'for_each_new_plane_in_state'
- 'for_each_new_plane_in_state_reverse'
@@ -324,40 +574,106 @@ ForEachMacros:
- 'for_each_node_by_name'
- 'for_each_node_by_type'
- 'for_each_node_mask'
+ - 'for_each_node_mask_to_alloc'
+ - 'for_each_node_mask_to_free'
- 'for_each_node_state'
- 'for_each_node_with_cpus'
- 'for_each_node_with_property'
+ - 'for_each_nondefault_eth_queue'
+ - 'for_each_nondefault_queue'
- 'for_each_nonreserved_multicast_dest_pgid'
- 'for_each_numa_hop_mask'
+ - 'for_each_obj_request'
+ - 'for_each_obj_request_safe'
+ - 'for_each_object'
- 'for_each_of_allnodes'
- 'for_each_of_allnodes_from'
- 'for_each_of_cpu_node'
- 'for_each_of_pci_range'
+ - 'for_each_ofldtxq'
- 'for_each_old_connector_in_state'
- 'for_each_old_crtc_in_state'
+ - 'for_each_old_global_obj_in_state'
+ - 'for_each_old_intel_crtc_in_state'
+ - 'for_each_old_intel_plane_in_state'
- 'for_each_old_mst_mgr_in_state'
- 'for_each_old_plane_in_state'
- 'for_each_old_private_obj_in_state'
- 'for_each_oldnew_connector_in_state'
- 'for_each_oldnew_crtc_in_state'
+ - 'for_each_oldnew_global_obj_in_state'
+ - 'for_each_oldnew_intel_crtc_in_state'
+ - 'for_each_oldnew_intel_crtc_in_state_reverse'
+ - 'for_each_oldnew_intel_plane_in_state'
- 'for_each_oldnew_mst_mgr_in_state'
- 'for_each_oldnew_plane_in_state'
- 'for_each_oldnew_plane_in_state_reverse'
- 'for_each_oldnew_private_obj_in_state'
+ - 'for_each_online_buffer_cpu'
- 'for_each_online_cpu'
- 'for_each_online_node'
- 'for_each_online_pgdat'
- 'for_each_or_bit'
+ - 'for_each_output_queue'
- 'for_each_path'
- 'for_each_pci_bridge'
- 'for_each_pci_dev'
+ - 'for_each_pci_segment'
+ - 'for_each_pci_segment_safe'
- 'for_each_pcm_streams'
+ - 'for_each_pcm_substream'
+ - 'for_each_pdsp'
+ - 'for_each_peer_device'
+ - 'for_each_peer_device_rcu'
+ - 'for_each_peer_device_safe'
+ - 'for_each_pending_queue'
+ - 'for_each_perag'
+ - 'for_each_perag_from'
+ - 'for_each_perag_range'
+ - 'for_each_perag_tag'
+ - 'for_each_perag_wrap'
+ - 'for_each_perag_wrap_at'
+ - 'for_each_perag_wrap_range'
+ - 'for_each_phy'
+ - 'for_each_phy_cfg'
+ - 'for_each_phy_lane'
+ - 'for_each_phy_masked'
+ - 'for_each_physmem_online_range'
- 'for_each_physmem_range'
+ - 'for_each_physmem_reserved_range'
+ - 'for_each_physmem_reserved_type_range'
+ - 'for_each_physmem_usable_range'
+ - 'for_each_pin_map'
+ - 'for_each_pipe'
+ - 'for_each_pipe_masked'
+ - 'for_each_plane_id_on_crtc'
+ - 'for_each_platform_timer'
+ - 'for_each_pmc_rcu'
+ - 'for_each_pmc_rtnl'
+ - 'for_each_pmc_socklock'
+ - 'for_each_pool'
+ - 'for_each_pool_worker'
- 'for_each_populated_zone'
+ - 'for_each_port'
+ - 'for_each_port_masked'
+ - 'for_each_possible_blade'
- 'for_each_possible_cpu'
+ - 'for_each_possible_early_cpu'
+ - 'for_each_possible_hypervisor_cpuid_base'
+ - 'for_each_power_domain'
+ - 'for_each_power_domain_well'
+ - 'for_each_power_domain_well_reverse'
+ - 'for_each_power_well'
+ - 'for_each_power_well_instance'
+ - 'for_each_power_well_instance_in_desc_list'
+ - 'for_each_power_well_reverse'
- 'for_each_present_cpu'
+ - 'for_each_present_guest_entry'
+ - 'for_each_present_section_nr'
+ - 'for_each_present_shadow_entry'
- 'for_each_prime_number'
- 'for_each_prime_number_from'
+ - 'for_each_prl_rcu'
- 'for_each_probe_cache_entry'
- 'for_each_process'
- 'for_each_process_thread'
@@ -367,21 +683,75 @@ ForEachMacros:
- 'for_each_prop_dlc_codecs'
- 'for_each_prop_dlc_cpus'
- 'for_each_prop_dlc_platforms'
+ - 'for_each_property'
- 'for_each_property_of_node'
+ - 'for_each_property_withdel'
+ - 'for_each_protocol_rcu'
+ - 'for_each_proxy_port'
+ - 'for_each_psf_mclock'
+ - 'for_each_psf_rcu'
+ - 'for_each_psf_tomb'
+ - 'for_each_pwq'
+ - 'for_each_qlogicpti'
+ - 'for_each_qmgr'
+ - 'for_each_queue'
+ - 'for_each_queue_range'
+ - 'for_each_rb_entry'
+ - 'for_each_rcar_dmac_chan'
+ - 'for_each_rcar_drif_channel'
+ - 'for_each_rdt_resource'
- 'for_each_reg'
- 'for_each_reg_filtered'
+ - 'for_each_region'
+ - 'for_each_registered_fb'
+ - 'for_each_rela'
- 'for_each_requested_gpio'
- 'for_each_requested_gpio_in_range'
- 'for_each_reserved_mem_range'
- 'for_each_reserved_mem_region'
+ - 'for_each_resource'
+ - 'for_each_resource_rcu'
+ - 'for_each_resource_safe'
+ - 'for_each_rinfo'
+ - 'for_each_rmap_spte'
+ - 'for_each_rmrr_units'
+ - 'for_each_root'
+ - 'for_each_rsnd_clkin'
+ - 'for_each_rsnd_clkout'
+ - 'for_each_rsnd_cmd'
+ - 'for_each_rsnd_ctu'
+ - 'for_each_rsnd_dai'
+ - 'for_each_rsnd_dvc'
+ - 'for_each_rsnd_mix'
+ - 'for_each_rsnd_mod'
+ - 'for_each_rsnd_mod_array'
+ - 'for_each_rsnd_mod_arrays'
+ - 'for_each_rsnd_src'
+ - 'for_each_rsnd_ssi'
+ - 'for_each_rsnd_ssiu'
+ - 'for_each_rt_rq'
- 'for_each_rtd_codec_dais'
- 'for_each_rtd_components'
- 'for_each_rtd_cpu_dais'
- 'for_each_rtd_dais'
+ - 'for_each_runnable_thread'
+ - 'for_each_rx_queue'
+ - 'for_each_rx_queue_cnic'
+ - 'for_each_rxsc'
+ - 'for_each_rxsc_rtnl'
+ - 'for_each_sas_task'
+ - 'for_each_sched_entity'
+ - 'for_each_sched_rt_entity'
- 'for_each_script'
+ - 'for_each_sctp_chunk'
+ - 'for_each_sd_topology'
- 'for_each_sec'
+ - 'for_each_sec_slave'
+ - 'for_each_section'
+ - 'for_each_sequencer'
- 'for_each_set_bit'
- 'for_each_set_bit_from'
+ - 'for_each_set_bit_inv'
- 'for_each_set_bit_wrap'
- 'for_each_set_bitrange'
- 'for_each_set_bitrange_from'
@@ -389,41 +759,117 @@ ForEachMacros:
- 'for_each_sg'
- 'for_each_sg_dma_page'
- 'for_each_sg_page'
+ - 'for_each_sgt_daddr'
+ - 'for_each_sgt_page'
- 'for_each_sgtable_dma_page'
- 'for_each_sgtable_dma_sg'
- 'for_each_sgtable_page'
- 'for_each_sgtable_sg'
+ - 'for_each_shadow_entry'
+ - 'for_each_shadow_entry_lockless'
+ - 'for_each_shadow_entry_using_root'
+ - 'for_each_sibling'
- 'for_each_sibling_event'
+ - 'for_each_signaler'
+ - 'for_each_sk_fl_rcu'
+ - 'for_each_slave'
+ - 'for_each_slot_rmap_range'
+ - 'for_each_source'
+ - 'for_each_sp'
+ - 'for_each_sprite'
+ - 'for_each_sr'
+ - 'for_each_ss_steering'
- 'for_each_sta_active_link'
+ - 'for_each_sta_info'
+ - 'for_each_stream_map'
+ - 'for_each_sub_region'
- 'for_each_subelement'
- 'for_each_subelement_extid'
- 'for_each_subelement_id'
- 'for_each_sublist'
+ - 'for_each_subsys'
- 'for_each_subsystem'
+ - 'for_each_suitable_policy'
- 'for_each_supported_activate_fn'
- 'for_each_supported_inject_fn'
- 'for_each_sym'
+ - 'for_each_tag'
+ - 'for_each_tdp_mmu_root'
+ - 'for_each_tdp_mmu_root_yield_safe'
+ - 'for_each_tdp_pte'
+ - 'for_each_tdp_pte_min_level'
- 'for_each_test'
- 'for_each_thread'
- 'for_each_token'
+ - 'for_each_trace_kprobe'
+ - 'for_each_trace_uprobe'
+ - 'for_each_tracing_cpu'
+ - 'for_each_transaction_entry'
+ - 'for_each_transaction_entry_reverse'
+ - 'for_each_tunnel_rcu'
+ - 'for_each_tx_queue'
+ - 'for_each_tx_queue_cnic'
+ - 'for_each_uabi_class_engine'
+ - 'for_each_uabi_engine'
+ - 'for_each_ufs_rx_lane'
+ - 'for_each_ufs_tx_lane'
+ - 'for_each_uldrxq'
+ - 'for_each_umc'
+ - 'for_each_unbuddied_list'
- 'for_each_unicast_dest_pgid'
+ - 'for_each_until'
+ - 'for_each_uvc_urb'
- 'for_each_valid_link'
+ - 'for_each_valid_rx_queue'
+ - 'for_each_valid_sp'
+ - 'for_each_valid_tdp_mmu_root_yield_safe'
+ - 'for_each_valid_tx_queue'
+ - 'for_each_vf'
+ - 'for_each_vf_sb'
+ - 'for_each_vfq'
- 'for_each_vif_active_link'
+ - 'for_each_virq'
- 'for_each_vma'
- 'for_each_vma_range'
- 'for_each_vsi'
+ - 'for_each_vsi_from'
+ - 'for_each_vti6_tunnel_rcu'
+ - 'for_each_waiter'
- 'for_each_wakeup_source'
+ - 'for_each_written_bset'
+ - 'for_each_xattr_handler'
+ - 'for_each_xbitmap_extent'
+ - 'for_each_xfrmi_rcu'
+ - 'for_each_xfs_iext'
+ - 'for_each_zcrypt_card'
+ - 'for_each_zcrypt_queue'
- 'for_each_zone'
- 'for_each_zone_zonelist'
- 'for_each_zone_zonelist_nodemask'
+ - 'fq_ring_for_each'
+ - 'fs_for_each_dst'
+ - 'fs_for_each_fg'
+ - 'fs_for_each_ft'
+ - 'fs_for_each_ft_safe'
+ - 'fs_for_each_fte'
+ - 'fs_for_each_ns'
+ - 'fs_for_each_ns_or_ft'
+ - 'fs_for_each_ns_or_ft_reverse'
+ - 'fs_for_each_prio'
+ - 'fs_list_for_each_entry'
+ - 'fs_list_for_each_entry_safe'
- 'func_for_each_insn'
- 'fwnode_for_each_available_child_node'
- 'fwnode_for_each_child_node'
- 'fwnode_for_each_parent_node'
- 'fwnode_graph_for_each_endpoint'
- 'gadget_for_each_ep'
+ - 'gbaudio_dapm_for_each_direction'
+ - 'gen6_for_each_pde'
- 'genradix_for_each'
- 'genradix_for_each_from'
+ - 'gmap_for_each_rmap'
+ - 'gmap_for_each_rmap_safe'
- 'hash_for_each'
- 'hash_for_each_possible'
- 'hash_for_each_possible_rcu'
@@ -458,8 +904,25 @@ ForEachMacros:
- 'hlist_nulls_for_each_entry_from'
- 'hlist_nulls_for_each_entry_rcu'
- 'hlist_nulls_for_each_entry_safe'
+ - 'hns3_for_each_ring'
+ - 'hsr_for_each_port'
- 'i3c_bus_for_each_i2cdev'
- 'i3c_bus_for_each_i3cdev'
+ - 'i40e_for_each_ring'
+ - 'iavf_for_each_ring'
+ - 'ice_for_each_alloc_rxq'
+ - 'ice_for_each_alloc_txq'
+ - 'ice_for_each_chnl_tc'
+ - 'ice_for_each_q_vector'
+ - 'ice_for_each_rx_ring'
+ - 'ice_for_each_rxq'
+ - 'ice_for_each_traffic_class'
+ - 'ice_for_each_tx_ring'
+ - 'ice_for_each_txq'
+ - 'ice_for_each_vf'
+ - 'ice_for_each_vf_rcu'
+ - 'ice_for_each_vsi'
+ - 'ice_for_each_xdp_txq'
- 'idr_for_each_entry'
- 'idr_for_each_entry_continue'
- 'idr_for_each_entry_continue_ul'
@@ -467,27 +930,50 @@ ForEachMacros:
- 'in_dev_for_each_ifa_rcu'
- 'in_dev_for_each_ifa_rtnl'
- 'inet_bind_bucket_for_each'
+ - 'intel_atomic_crtc_state_for_each_plane_state'
+ - 'intel_for_each_global_obj'
+ - 'interval_tree_for_each_double_span'
- 'interval_tree_for_each_span'
- 'intlist__for_each_entry'
- 'intlist__for_each_entry_safe'
+ - 'io_for_each_link'
+ - 'iopt_for_each_contig_area'
+ - 'ip6mr_for_each_table'
+ - 'ipmr_for_each_table'
+ - 'ixgbe_for_each_ring'
+ - 'ixgbevf_for_each_ring'
- 'kcore_copy__for_each_phdr'
- 'key_for_each'
- 'key_for_each_safe'
+ - 'klist_for_each_entry'
- 'klp_for_each_func'
- 'klp_for_each_func_safe'
- 'klp_for_each_func_static'
- 'klp_for_each_object'
- 'klp_for_each_object_safe'
- 'klp_for_each_object_static'
+ - 'klp_for_each_patch'
+ - 'klp_for_each_patch_safe'
+ - 'klp_for_each_state'
- 'kunit_suite_for_each_test_case'
- 'kvm_for_each_memslot'
- 'kvm_for_each_memslot_in_gfn_range'
+ - 'kvm_for_each_memslot_in_hva_range'
- 'kvm_for_each_vcpu'
+ - 'label_for_each'
+ - 'label_for_each_comb'
+ - 'label_for_each_confined'
+ - 'label_for_each_cont'
+ - 'label_for_each_in_merge'
+ - 'label_for_each_in_ns'
+ - 'label_for_each_not_in_set'
- 'libbpf_nla_for_each_attr'
- 'list_for_each'
+ - 'list_for_each_advance_continue'
- 'list_for_each_codec'
- 'list_for_each_codec_safe'
- 'list_for_each_continue'
+ - 'list_for_each_cookie'
- 'list_for_each_entry'
- 'list_for_each_entry_continue'
- 'list_for_each_entry_continue_rcu'
@@ -497,6 +983,7 @@ ForEachMacros:
- 'list_for_each_entry_from_reverse'
- 'list_for_each_entry_lockless'
- 'list_for_each_entry_rcu'
+ - 'list_for_each_entry_rcu_locked'
- 'list_for_each_entry_reverse'
- 'list_for_each_entry_safe'
- 'list_for_each_entry_safe_continue'
@@ -508,6 +995,8 @@ ForEachMacros:
- 'list_for_each_prev_safe'
- 'list_for_each_rcu'
- 'list_for_each_safe'
+ - 'list_for_each_table_entry'
+ - 'list_for_each_xattr'
- 'llist_for_each'
- 'llist_for_each_entry'
- 'llist_for_each_entry_safe'
@@ -518,6 +1007,10 @@ ForEachMacros:
- 'maps__for_each_entry_safe'
- 'mas_for_each'
- 'mci_for_each_dimm'
+ - 'mcp251xfd_for_each_rx_ring'
+ - 'mcp251xfd_for_each_tx_obj'
+ - 'mdesc_for_each_arc'
+ - 'mdesc_for_each_node_by_name'
- 'media_device_for_each_entity'
- 'media_device_for_each_intf'
- 'media_device_for_each_link'
@@ -525,9 +1018,29 @@ ForEachMacros:
- 'media_entity_for_each_pad'
- 'media_pipeline_for_each_entity'
- 'media_pipeline_for_each_pad'
+ - 'mlx5_esw_for_each_entry_marked'
+ - 'mlx5_esw_for_each_host_func_vport'
+ - 'mlx5_esw_for_each_rep'
+ - 'mlx5_esw_for_each_sf_rep'
+ - 'mlx5_esw_for_each_vf_rep'
+ - 'mlx5_esw_for_each_vf_vport'
+ - 'mlx5_esw_for_each_vport'
+ - 'mlx5_esw_for_each_vport_marked'
+ - 'mlx5e_for_each_arfs_rule'
+ - 'mlx5e_for_each_hash_arfs_rule'
+ - 'mlx5e_for_each_hash_node'
+ - 'mlxsw_afk_element_usage_for_each'
+ - 'mlxsw_sp_nexthop_for_each'
+ - 'mlxsw_sp_prefix_usage_for_each'
+ - 'mlxsw_sp_rif_neigh_for_each'
+ - 'mptcp_for_each_subflow'
+ - 'mptcp_for_each_subflow_safe'
- 'msi_domain_for_each_desc'
- 'msi_for_each_desc'
+ - 'mt76_for_each_q_rx'
- 'mt_for_each'
+ - 'mtd_for_each_device'
+ - 'mtrr_for_each_mem_type'
- 'nanddev_io_for_each_page'
- 'netdev_for_each_lower_dev'
- 'netdev_for_each_lower_private'
@@ -538,11 +1051,17 @@ ForEachMacros:
- 'netdev_for_each_uc_addr'
- 'netdev_for_each_upper_dev_rcu'
- 'netdev_hw_addr_list_for_each'
+ - 'nfp_for_each_insn_walk2'
+ - 'nfp_for_each_insn_walk3'
+ - 'nft_pipapo_for_each_field'
+ - 'nft_rule_dp_for_each_expr'
- 'nft_rule_for_each_expr'
+ - 'nilfs_for_each_segbuf_before'
- 'nla_for_each_attr'
- 'nla_for_each_nested'
- 'nlmsg_for_each_attr'
- 'nlmsg_for_each_msg'
+ - 'nouveau_for_each_non_mst_connector_iter'
- 'nr_neigh_for_each'
- 'nr_neigh_for_each_safe'
- 'nr_node_for_each'
@@ -550,16 +1069,22 @@ ForEachMacros:
- 'of_for_each_phandle'
- 'of_property_for_each_string'
- 'of_property_for_each_u32'
+ - 'pack_for_each_init'
+ - 'page_chain_for_each'
+ - 'page_chain_for_each_safe'
- 'pci_bus_for_each_resource'
- 'pci_dev_for_each_resource'
- 'pcl_for_each_chunk'
- 'pcl_for_each_segment'
- 'pcm_for_each_format'
+ - 'pcpu_for_each_fit_region'
+ - 'pcpu_for_each_md_free_region'
- 'perf_config_items__for_each_entry'
- 'perf_config_sections__for_each_entry'
- 'perf_config_set__for_each_entry'
- 'perf_cpu_map__for_each_cpu'
- 'perf_cpu_map__for_each_idx'
+ - 'perf_event_groups_for_each'
- 'perf_evlist__for_each_entry'
- 'perf_evlist__for_each_entry_reverse'
- 'perf_evlist__for_each_entry_safe'
@@ -572,21 +1097,43 @@ ForEachMacros:
- 'perf_pmu__for_each_hybrid_pmu'
- 'perf_pmus__for_each_pmu'
- 'perf_tool_event__for_each_event'
+ - 'ping_portaddr_for_each_entry'
+ - 'ping_portaddr_for_each_entry_rcu'
+ - 'pldm_for_each_component'
+ - 'pldm_for_each_desc_tlv'
+ - 'pldm_for_each_record'
- 'plist_for_each'
- 'plist_for_each_continue'
- 'plist_for_each_entry'
- 'plist_for_each_entry_continue'
- 'plist_for_each_entry_safe'
- 'plist_for_each_safe'
+ - 'pmc_for_each_mode'
- 'pnp_for_each_card'
- 'pnp_for_each_dev'
+ - 'ppr_for_each_entry'
+ - 'prb_for_each_info'
+ - 'prb_for_each_record'
+ - 'priolist_for_each_request'
+ - 'priolist_for_each_request_consume'
- 'protocol_for_each_card'
- 'protocol_for_each_dev'
+ - 'qed_for_each_vf'
+ - 'qeth_for_each_output_queue'
+ - 'qlink_for_each_tlv'
+ - 'queue_for_each'
- 'queue_for_each_hw_ctx'
- 'radix_tree_for_each_slot'
- 'radix_tree_for_each_tagged'
- 'rb_for_each'
- 'rbtree_postorder_for_each_entry_safe'
+ - 'rcar_thermal_for_each_priv'
+ - 'rcu_for_each_leaf_node'
+ - 'rcu_for_each_node_breadth_first'
+ - 'rdev_for_each'
+ - 'rdev_for_each_list'
+ - 'rdev_for_each_rcu'
+ - 'rdev_for_each_safe'
- 'rdma_for_each_block'
- 'rdma_for_each_port'
- 'rdma_umem_for_each_dma_block'
@@ -604,10 +1151,15 @@ ForEachMacros:
- 'rht_for_each_from'
- 'rht_for_each_rcu'
- 'rht_for_each_rcu_from'
+ - 'rocker_tlv_for_each'
+ - 'rocker_tlv_for_each_nested'
- 'rq_for_each_bvec'
- 'rq_for_each_segment'
- 'rq_list_for_each'
- 'rq_list_for_each_safe'
+ - 'rswitch_for_each_enabled_port'
+ - 'rswitch_for_each_enabled_port_continue_reverse'
+ - 'rtw89_for_each_rtwvif'
- 'sample_read_group__for_each'
- 'scsi_for_each_prot_sg'
- 'scsi_for_each_sg'
@@ -631,34 +1183,81 @@ ForEachMacros:
- 'sk_nulls_for_each_rcu'
- 'snd_array_for_each'
- 'snd_pcm_group_for_each_entry'
+ - 'snd_soc_dapm_for_each_direction'
- 'snd_soc_dapm_widget_for_each_path'
- 'snd_soc_dapm_widget_for_each_path_safe'
- 'snd_soc_dapm_widget_for_each_sink_path'
- 'snd_soc_dapm_widget_for_each_source_path'
+ - 'srcu_for_each_node_breadth_first'
- 'strlist__for_each_entry'
- 'strlist__for_each_entry_safe'
- 'sym_for_each_insn'
- 'sym_for_each_insn_continue_reverse'
- 'symbols__for_each_entry'
+ - 'tb_for_each_port_on_path'
+ - 'tb_path_for_each_hop'
- 'tb_property_for_each'
+ - 'tb_switch_for_each_port'
- 'tcf_act_for_each_action'
- 'tcf_exts_for_each_action'
+ - 'tcm_for_each_slice'
+ - 'tdp_mmu_for_each_pte'
+ - 'tdp_root_for_each_leaf_pte'
+ - 'tdp_root_for_each_pte'
+ - 'trace_probe_for_each_link'
+ - 'trace_probe_for_each_link_rcu'
- 'ttm_resource_manager_for_each_res'
- 'twsk_for_each_bound_bhash2'
+ - 'tx_queue_for_each'
+ - 'txall_queue_for_each'
+ - 'ubi_for_each_free_peb'
+ - 'ubi_for_each_protected_peb'
+ - 'ubi_for_each_scrub_peb'
+ - 'ubi_for_each_used_peb'
+ - 'ubi_rb_for_each_entry'
- 'udp_portaddr_for_each_entry'
- 'udp_portaddr_for_each_entry_rcu'
+ - 'unwind_for_each_frame'
+ - 'usb3_for_each_dma'
+ - 'usb3_for_each_ep'
- 'usb_hub_for_each_child'
+ - 'usbhs_for_each_dfifo'
+ - 'usbhs_for_each_pipe'
+ - 'usbhs_for_each_pipe_with_dcp'
+ - 'usbhsg_for_each_uep'
+ - 'usbhsg_for_each_uep_with_dcp'
+ - 'usbhsh_for_each_udev'
+ - 'usbhsh_for_each_udev_with_dev0'
- 'v4l2_device_for_each_subdev'
- 'v4l2_m2m_for_each_dst_buf'
- 'v4l2_m2m_for_each_dst_buf_safe'
- 'v4l2_m2m_for_each_src_buf'
- 'v4l2_m2m_for_each_src_buf_safe'
- 'virtio_device_for_each_vq'
+ - 'virtio_mem_bbm_for_each_bb'
+ - 'virtio_mem_bbm_for_each_bb_rev'
+ - 'virtio_mem_sbm_for_each_mb'
+ - 'virtio_mem_sbm_for_each_mb_rev'
+ - 'vlan_group_for_each_dev'
+ - 'vnic_hash_for_each'
+ - 'vnic_hash_for_each_possible'
+ - 'vnic_hash_for_each_safe'
+ - 'while_for_each_event_file'
- 'while_for_each_ftrace_op'
+ - 'while_for_each_ftrace_rec'
+ - 'wl12xx_for_each_wlvif'
+ - 'wl12xx_for_each_wlvif_ap'
+ - 'wl12xx_for_each_wlvif_bss_type'
+ - 'wl12xx_for_each_wlvif_continue'
+ - 'wl12xx_for_each_wlvif_sta'
+ - 'wq_list_for_each'
+ - 'wq_list_for_each_resume'
+ - 'wx_for_each_ring'
- 'xa_for_each'
- 'xa_for_each_marked'
- 'xa_for_each_range'
- 'xa_for_each_start'
+ - 'xan_for_each_marked'
- 'xas_for_each'
- 'xas_for_each_conflict'
- 'xas_for_each_marked'
--
2.40.1
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