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Message-ID: <0815c0b5-304b-568f-5a64-d19d7d2aeb93@linaro.org>
Date:   Tue, 9 May 2023 15:36:25 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Sumit Gupta <sumitg@...dia.com>, treding@...dia.com,
        dmitry.osipenko@...labora.com, viresh.kumar@...aro.org,
        rafael@...nel.org, jonathanh@...dia.com, robh+dt@...nel.org,
        lpieralisi@...nel.org, helgaas@...nel.org
Cc:     linux-kernel@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-pci@...r.kernel.org, mmaddireddy@...dia.com, kw@...ux.com,
        bhelgaas@...gle.com, vidyas@...dia.com, sanjayc@...dia.com,
        ksitaraman@...dia.com, ishah@...dia.com, bbasu@...dia.com
Subject: Re: [Patch v7 1/8] memory: tegra: add interconnect support for DRAM
 scaling in Tegra234

On 09/05/2023 15:17, Sumit Gupta wrote:
>>>>>> +                     /*
>>>>>> +                      * MC driver probe can't get BPMP reference as
>>>>>> it gets probed
>>>>>> +                      * earlier than BPMP. So, save the BPMP ref got
>>>>>> from the EMC
>>>>>> +                      * DT node in the mc->bpmp and use it in MC's
>>>>>> icc_set hook.
>>>>>> +                      */
>>>>>> +                     mc->bpmp = emc->bpmp;
>>>>>
>>>>> This (and ()) are called without any locking. You register first the
>>>>> interconnect, so set() callback can be used, right? Then set() could be
>>>>> called anytime between tegra_emc_interconnect_init() and assignment
>>>>> above. How do you synchronize these?
>>>>>
>>>>> Best regards,
>>>>> Krzysztof
>>>>>
>>>>
>>>> Currently, the tegra234_mc_icc_set() has NULL check. So, it will give
>>>> this error.
>>>>    if (!mc->bpmp) {
>>
>> How does it solve concurrent accesses and re-ordering of instructions by
>> compiler or CPU?
>>
> 
> Now, the "mc->bpmp" is set before tegra_emc_interconnect_init().
> So, until the EMC interconnect initializes, set() won't be
> called as the devm_of_icc_get() call will fail.

What if compiler puts "mc->bpmp" assignment after
tegra_emc_interconnect_init()?

What if CPU executes above assignment also after
tegra_emc_interconnect_init()?

Considering amount of code inside tegra_emc_interconnect_init() second
case is rather unlikely, but first possible, right?

Best regards,
Krzysztof

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