[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20230510192029.GB18514@ranerica-svr.sc.intel.com>
Date: Wed, 10 May 2023 12:20:29 -0700
From: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
To: x86@...nel.org
Cc: Andreas Herrmann <aherrmann@...e.com>,
Chen Yu <yu.c.chen@...el.com>, Len Brown <len.brown@...el.com>,
Pu Wen <puwen@...on.cn>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Zhang Rui <rui.zhang@...el.com>,
Ricardo Neri <ricardo.neri@...el.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/2] x86/cacheinfo: Set the number of leaves per CPU
On Sun, Apr 23, 2023 at 05:19:54PM -0700, Ricardo Neri wrote:
> Hi,
>
> This v2 of now a patchset to set the number of cache leaves independently
> for each CPU. v1 can be found here [1].
>
> These are the changes since v2:
> * Dave Hansen, suggested to use the existing per-CPU ci_cpu_cacheinfo
> variable. Now the global variable num_cache_leaves became useless.
> * While here, I noticed that init_cache_level() also became useless:
> x86 does not need ci_cpu_cacheinfo::num_levels.
>
> These patches apply cleanly on top of the master branch of the tip tree.
FYI, I see a NULL pointer dereference when I apply this patchset on top of
v6.4-rc1. I started a discussion here[1].
[1]. https://lore.kernel.org/all/20230510191207.GA18514@ranerica-svr.sc.intel.com/
Powered by blists - more mailing lists