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Message-ID: <ZFwtn2amurR-qKuB@ofant>
Date:   Thu, 11 May 2023 07:49:51 +0800
From:   Yixun Lan <dlan@...too.org>
To:     Yangtao Li <frank.li@...o.com>
Cc:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Jisheng Zhang <jszhang@...nel.org>,
        Icenowy Zheng <uwu@...nowy.me>, Wei Fu <wefu@...hat.com>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/5] riscv: Add the T-HEAD SoC family Kconfig option

HI Yangtao:

On 04:44 Thu 11 May     , Yangtao Li wrote:
> From: Jisheng Zhang <jszhang@...nel.org>
> 
> The first SoC in the T-HEAD series is light(a.k.a th1520), containing
> quad T-HEAD C910 cores.
> 
> Cc: Icenowy Zheng <uwu@...nowy.me>
> Cc: Wei Fu <wefu@...hat.com>
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> Signed-off-by: Yangtao Li <frank.li@...o.com>
> ---
>  arch/riscv/Kconfig.socs | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 1cf69f958f10..ce10a38dff37 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -41,6 +41,12 @@ config ARCH_SUNXI
>  	  This enables support for Allwinner sun20i platform hardware,
>  	  including boards based on the D1 and D1s SoCs.
>  
> +config ARCH_THEAD
> +	bool "T-HEAD RISC-V SoCs"
> +	select ERRATA_THEAD
> +	help
> +	  This enables support for the RISC-V based T-HEAD SoCs.
This help section is a little bit short.. better to provide more
information about the T-Head's SoC series you want to cover?
> +
>  config ARCH_VIRT
>  	def_bool SOC_VIRT
>  
> -- 
> 2.34.1
> 

It would be great to have a cover letter for this series plus having an overall
history changes

Just curious, so you've taked to Jisheng, to take over this series? and will do
follow-up version bump?

-- 
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55

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