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Message-ID: <20230510065623.GC11711@pendragon.ideasonboard.com>
Date: Wed, 10 May 2023 09:56:23 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Michal Simek <michal.simek@....com>
Cc: linux-kernel@...r.kernel.org, monstr@...str.eu,
michal.simek@...inx.com, git@...inx.com,
Amit Kumar Mahapatra <amit.kumar-mahapatra@...inx.com>,
Ashok Reddy Soma <ashok.reddy.soma@...inx.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Parth Gajjar <parth.gajjar@....com>,
Rob Herring <robh+dt@...nel.org>,
Srinivas Neeli <srinivas.neeli@...inx.com>,
Vishal Sagar <vishal.sagar@....com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 03/23] arm64: zynqmp: Set qspi tx-buswidth to 4
Hi Michal,
Thank you for the patch.
On Tue, May 02, 2023 at 03:35:31PM +0200, Michal Simek wrote:
> From: Amit Kumar Mahapatra <amit.kumar-mahapatra@...inx.com>
>
> All ZynqMP boards are setting up tx-buswidth to 1. Due to this the
> framework only issues 1-1-1 write commands to the GQSPI driver. But the
> GQSPI controller is capable of handling 1-4-4 write commands, so updated
> the tx-buswidth to 4.
> This would enable the spi-nor framework to issue 1-4-4 write commands
> instead of 1-1-1. This will increase the tx data transfer rate, as now the
> tx data will be transferred on four lines instead on single line.
The change seems OK, but the commit message shouldn't mention drivers.
DT is a hardware description, the commit message should focus on that.
> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@...inx.com>
> Signed-off-by: Michal Simek <michal.simek@....com>
> ---
>
> arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 2 +-
> 11 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
> index 34412304d09f..dcc17e3ea961 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
> @@ -85,7 +85,7 @@ flash@0 { /* MT25QU512A */
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <40000000>; /* 40MHz */
> partition@0 {
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
> index f1598527e5ec..4d301ea0bdcb 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
> @@ -44,7 +44,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
> index 04efa1683eaa..485a7b21157a 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
> @@ -45,7 +45,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts
> index e971ba8c1418..676b8550a625 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts
> @@ -47,7 +47,7 @@ &qspi {
> flash@0 {
> compatible = "m25p80", "jedec,spi-nor";
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>;
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
> index 5fa9604f05d1..35fe7857459a 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
> @@ -355,7 +355,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
> index 6e0106bf1294..311cb2f81c7b 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
> @@ -173,7 +173,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> index 78043d9de7cc..5b6403865541 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> @@ -957,7 +957,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
> index c1779c88ec34..a74a2061431a 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
> @@ -444,7 +444,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
> index b857c1950496..73972d83ed4d 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
> @@ -456,7 +456,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
> index e4e09afbdc1a..5a54d066db86 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
> @@ -964,7 +964,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> index 791b2ac9fbdb..3b37df98700c 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> @@ -794,7 +794,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
--
Regards,
Laurent Pinchart
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