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Message-ID: <20230510132816.108820-2-minda.chen@starfivetech.com>
Date: Wed, 10 May 2023 21:28:15 +0800
From: Minda Chen <minda.chen@...rfivetech.com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Pawel Laszczak <pawell@...ence.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Peter Chen <peter.chen@...nel.org>,
Roger Quadros <rogerq@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>
CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-usb@...r.kernel.org>,
Minda Chen <minda.chen@...rfivetech.com>
Subject: [PATCH v2 1/2] dt-bindings: cdns,usb3: Add clock and reset
To support generic clock and reset init in Cadence USBSS
controller, add clock and reset dts configuration.
Signed-off-by: Minda Chen <minda.chen@...rfivetech.com>
---
.../devicetree/bindings/usb/cdns,usb3.yaml | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
index cae46c4982ad..623c6b34dee3 100644
--- a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
+++ b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
@@ -42,6 +42,18 @@ properties:
- const: otg
- const: wakeup
+ clocks:
+ minItems: 1
+ maxItems: 8
+ description:
+ USB controller clocks.
+
+ resets:
+ minItems: 1
+ maxItems: 8
+ description:
+ USB controller generic resets.
+
dr_mode:
enum: [host, otg, peripheral]
@@ -98,5 +110,7 @@ examples:
interrupt-names = "host", "peripheral", "otg";
maximum-speed = "super-speed";
dr_mode = "otg";
+ clocks = <&clk 1>, <&clk 2>, <&clk 3>;
+ resets = <&rst 1>, <&rst 2>, <&rst 3>;
};
};
--
2.17.1
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