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Message-ID: <20230511141114.04cbd9f1@xps-13>
Date:   Thu, 11 May 2023 14:11:14 +0200
From:   Miquel Raynal <miquel.raynal@...tlin.com>
To:     Arseniy Krasnov <avkrasnov@...rdevices.ru>
Cc:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        Liang Yang <liang.yang@...ogic.com>,
        Richard Weinberger <richard@....at>,
        Vignesh Raghavendra <vigneshr@...com>,
        Neil Armstrong <neil.armstrong@...aro.org>,
        Kevin Hilman <khilman@...libre.com>,
        Jerome Brunet <jbrunet@...libre.com>,
        Jianxin Pan <jianxin.pan@...ogic.com>,
        Yixun Lan <yixun.lan@...ogic.com>, <oxffffaa@...il.com>,
        <kernel@...rdevices.ru>, <linux-mtd@...ts.infradead.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-amlogic@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 6/6] mtd: rawnand: meson: rename node for chip select

Hi Arseniy,

avkrasnov@...rdevices.ru wrote on Thu, 11 May 2023 13:16:59 +0300:

> On 11.05.2023 12:17, Arseniy Krasnov wrote:
> > 
> > 
> > On 11.05.2023 12:12, Miquel Raynal wrote:  
> >> Hi Arseniy,
> >>
> >> avkrasnov@...rdevices.ru wrote on Thu, 11 May 2023 11:59:07 +0300:
> >>  
> >>> On 10.05.2023 23:53, Miquel Raynal wrote:
> >>>
> >>> Hello Martin, Miquel
> >>>  
> >>>> Hi Martin & Arseniy,
> >>>>
> >>>> martin.blumenstingl@...glemail.com wrote on Wed, 10 May 2023 22:40:37
> >>>> +0200:
> >>>>     
> >>>>> Hello Arseniy,
> >>>>>
> >>>>> On Wed, May 10, 2023 at 1:13 PM Arseniy Krasnov
> >>>>> <AVKrasnov@...rdevices.ru> wrote:    
> >>>>>>
> >>>>>> This renames node with values for chip select from "reg" to "cs". It is
> >>>>>> needed because when OTP access is enabled on the attached storage, MTD
> >>>>>> subsystem registers this storage in the NVMEM subsystem. NVMEM in turn
> >>>>>> tries to use "reg" node in its own manner, supposes that it has another
> >>>>>> layout. All of this leads to device initialization failure.      
> >>>>> In general: if we change the device-tree interface (in this case:
> >>>>> replacing a "reg" with a "cs" property) the dt-bindings have to be
> >>>>> updated as well.    
> >>>>
> >>>> True, and I would add, bindings should not be broken.    
> >>>
> >>> I see, that's true. That is bad way to change bindings.
> >>>  
> >>>>     
> >>>>> Documentation/devicetree/bindings/mtd/nand-controller.yaml and
> >>>>> Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml show
> >>>>> that the chip select of a NAND chip is specified with a "reg"
> >>>>> property.    
> >>>>
> >>>> All NAND controller binding expect the chip-select to be in the
> >>>> 'reg' property, very much like a spi device would use reg to store the
> >>>> cs as well: the reg property tells you how you address the device.
> >>>>
> >>>> I also fully agree with Martin's comments below. Changing reg is likely
> >>>> a wrong approach :)
> >>>>     
> >>>>> Also the code has to be backwards compatible with old .dtbs.
> >>>>>    
> >>>>>> Example:
> >>>>>>
> >>>>>> [...] nvmem mtd0-user-otp: nvmem: invalid reg on /soc/bus@...00000/...
> >>>>>> [...] mtd mtd0: Failed to register OTP NVMEM device
> >>>>>> [...] meson-nand ffe07800.nfc: failed to register MTD device: -22
> >>>>>> [...] meson-nand ffe07800.nfc: failed to init NAND chips
> >>>>>> [...] meson-nand: probe of ffe07800.nfc failed with error -22      
> >>>>> This is odd - can you please share your definition of the &nfc node?    
> >>>
> >>> Sure, here it is:
> >>>
> >>> mtd_nand: nfc@...0 {                            
> >>> 	compatible = "amlogic,meson-axg-nfc";
> >>> 	...
> >>> 	nand@0 {                                
> >>>         	reg = <0>;
> >>>         };
> >>> }
> >>>
> >>> I checked, that 'nand_set_flash_node()' is called with 'nand@0' and i suppose
> >>> that it is correct (as You mentioned below). But, 'nvmem_add_cells_from_of()' is called
> >>> with parent: 'nfc@...0', then it iterates over its childs, e.g. 'nand@0' and thus i get such
> >>> situation. I guess, that 'nvmem_add_cells_from_of()' must be called with 'nand@0' ?  
> >>
> >> We recently had issues with nvmem parsing, but I believe a mainline
> >> kernel should now be perfectly working on this regard. What version of
> >> the Linux kernel are you using?  
> > 
> > My current version is:
> > 
> > VERSION = 6                                                             
> > PATCHLEVEL = 2                                                          
> > SUBLEVEL = 0                                                            
> > EXTRAVERSION = -rc8 
> > 
> > Fix was in drivers/nvmem/* ?
> > 
> > Thanks, Arseniy  
> 
> Upd: I resolved problem in the following way:
> 
> nand@0 {                                
> 	reg = <0>;//chip select
> 
	partitions {
		compatible = ...

> 	otp@0 {                         
> 		#address-cells = <2>;   
> 		#size-cells = <0>;      

#address/size-cells is not needed here

> 		compatible = "user-otp";
> 		reg = <A B>;            
> 	};                              
> 	otp@1 {                         
> 		#address-cells = <2>;   
> 		#size-cells = <0>;      

Ditto

> 		compatible = "factory-otp";
> 		reg = <C D>;            
> 	};                              

	};

> };
> 
> Now nvmem subsystem parses 'otp@0' and 'otp@1' and error is gone. 'compatible' values are
> the same as in drivers/mtd/mtdcore.c:mtd_otp_nvmem_add(). 'reg' in 'nand@0' is used as
> chip select as supposed.

I don't fully get it. The parsing on the nvmem side should not fail if
there is no subpartition/otp-region defined. Can you confirm an empty
NAND device node works? Because your last e-mail suggested the opposite.

> 
> I think, this patch should be abandoned in the next version.
> 
> Thanks, Arseniy
> 
> >   
> >>
> >> Thanks,
> >> Miquèl  


Thanks,
Miquèl

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