linux-kernel - Re: [PATCH v4 6/7] riscv: dts: starfive: jh7110: Add syscon nodes

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <3bb6c544-0b21-4728-683d-70db0f80394f@linaro.org>
Date:   Fri, 12 May 2023 08:36:39 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Xingyu Wu <xingyu.wu@...rfivetech.com>,
        linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Conor Dooley <conor@...nel.org>,
        Emil Renner Berthing <kernel@...il.dk>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Hal Feng <hal.feng@...rfivetech.com>,
        William Qiu <william.qiu@...rfivetech.com>,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v4 6/7] riscv: dts: starfive: jh7110: Add syscon nodes

On 12/05/2023 04:20, Xingyu Wu wrote:
> From: William Qiu <william.qiu@...rfivetech.com>
> 
> Add stg_syscon/sys_syscon/aon_syscon nodes for JH7110 Soc.
> 
> Co-developed-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
> Signed-off-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> Signed-off-by: William Qiu <william.qiu@...rfivetech.com>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 4c5fdb905da8..fa27fd4169a8 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -353,6 +353,11 @@ i2c2: i2c@...50000 {
>  			status = "disabled";
>  		};
>  
> +		stg_syscon: syscon@...40000 {
> +			compatible = "starfive,jh7110-stg-syscon", "syscon";
> +			reg = <0x0 0x10240000 0x0 0x1000>;
> +		};
> +
>  		uart3: serial@...00000 {
>  			compatible = "snps,dw-apb-uart";
>  			reg = <0x0 0x12000000 0x0 0x10000>;
> @@ -457,6 +462,11 @@ syscrg: clock-controller@...20000 {
>  			#reset-cells = <1>;
>  		};
>  
> +		sys_syscon: syscon@...30000 {
> +			compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
> +			reg = <0x0 0x13030000 0x0 0x1000>;

No children, drop the simple-mfd. Or your binding is incorrect or your
DTS is incomplete (you mentioned clock-controller). DTS should be complete.

Best regards,
Krzysztof