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Message-ID: <8603c2b2-2a5b-48f6-9b08-9b3b518b716b@gmail.com>
Date: Fri, 12 May 2023 13:51:49 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Markus Schneider-Pargmann <msp@...libre.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
Cc: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Alexandre Mergnat <amergnat@...libre.com>
Subject: Re: [PATCH] clk: mediatek: mt8365: Fix inverted topclk operations
On 11/05/2023 15:32, Markus Schneider-Pargmann wrote:
> The given operations are inverted for the wrong registers which makes
> multiple of the mt8365 hardware units unusable. In my setup at least usb
> did not work.
>
> Fixed by swapping the operations with the inverted ones.
>
> Reported-by: Alexandre Mergnat <amergnat@...libre.com>
> Fixes: 905b7430d3cc ("clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocks")
> Signed-off-by: Markus Schneider-Pargmann <msp@...libre.com>
Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>
> ---
> drivers/clk/mediatek/clk-mt8365.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt8365.c b/drivers/clk/mediatek/clk-mt8365.c
> index 6b4e193f648d..6d785ec5754d 100644
> --- a/drivers/clk/mediatek/clk-mt8365.c
> +++ b/drivers/clk/mediatek/clk-mt8365.c
> @@ -583,15 +583,15 @@ static const struct mtk_gate_regs top2_cg_regs = {
>
> #define GATE_TOP0(_id, _name, _parent, _shift) \
> GATE_MTK(_id, _name, _parent, &top0_cg_regs, \
> - _shift, &mtk_clk_gate_ops_no_setclr_inv)
> + _shift, &mtk_clk_gate_ops_no_setclr)
>
> #define GATE_TOP1(_id, _name, _parent, _shift) \
> GATE_MTK(_id, _name, _parent, &top1_cg_regs, \
> - _shift, &mtk_clk_gate_ops_no_setclr)
> + _shift, &mtk_clk_gate_ops_no_setclr_inv)
>
> #define GATE_TOP2(_id, _name, _parent, _shift) \
> GATE_MTK(_id, _name, _parent, &top2_cg_regs, \
> - _shift, &mtk_clk_gate_ops_no_setclr)
> + _shift, &mtk_clk_gate_ops_no_setclr_inv)
>
> static const struct mtk_gate top_clk_gates[] = {
> GATE_TOP0(CLK_TOP_CONN_32K, "conn_32k", "clk32k", 10),
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