linux-kernel - [PATCH v3 09/10] arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller

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Message-Id: <20230512122134.24339-10-quic_kbajaj@quicinc.com>
Date:   Fri, 12 May 2023 17:51:33 +0530
From:   Komal Bajaj <quic_kbajaj@...cinc.com>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc:     Komal Bajaj <quic_kbajaj@...cinc.com>,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: [PATCH v3 09/10] arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller

Add a DT node for Last level cache (aka. system cache) controller
which provides control over the last level cache present on QDU1000
and QRU1000 SoCs.

Signed-off-by: Komal Bajaj <quic_kbajaj@...cinc.com>
---
 arch/arm64/boot/dts/qcom/qdu1000.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index ff21e7a6b312..3c557ca27500 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1322,6 +1322,22 @@
 			#interconnect-cells = <2>;
 		};

+		system-cache-controller@...00000 {
+			compatible = "qcom,qdu1000-llcc";
+			reg = <0 0x19200000 0 0x80000>, <0 0x19600000 0 0x80000>,
+			      <0 0x19300000 0 0x80000>, <0 0x19700000 0 0x80000>,
+			      <0 0x19a00000 0 0x80000>, <0 0x19b00000 0 0x80000>,
+			      <0 0x19e00000 0 0x80000>, <0 0x19f00000 0 0x80000>,
+			      <0 0x1a200000 0 0x80000>;
+			reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
+				    "llcc3_base", "llcc4_base", "llcc5_base",
+				    "llcc6_base", "llcc7_base", "llcc_broadcast_base";
+			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+
+			nvmem-cell-names = "multi_chan_ddr";
+			nvmem-cells = <&multi_chan_ddr>;
+		};
+
 		qfprom: efuse@...c8000 {
 			compatible = "qcom,qdu1000-qfprom", "qcom,qfprom";
 			reg = <0 0x221c8000 0 0x1000>;
--
2.17.1