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Message-ID: <20230512022036.97987-6-xingyu.wu@starfivetech.com>
Date: Fri, 12 May 2023 10:20:34 +0800
From: Xingyu Wu <xingyu.wu@...rfivetech.com>
To: <linux-riscv@...ts.infradead.org>, <devicetree@...r.kernel.org>,
"Michael Turquette" <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Conor Dooley <conor@...nel.org>,
"Emil Renner Berthing" <kernel@...il.dk>
CC: Rob Herring <robh+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Hal Feng <hal.feng@...rfivetech.com>,
Xingyu Wu <xingyu.wu@...rfivetech.com>,
William Qiu <william.qiu@...rfivetech.com>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>
Subject: [PATCH v4 5/7] dt-bindings: soc: starfive: Add StarFive syscon module
From: William Qiu <william.qiu@...rfivetech.com>
Add documentation to describe StarFive System Controller Registers.
Co-developed-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
Signed-off-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
Reviewed-by: Rob Herring <robh@...nel.org>
Signed-off-by: William Qiu <william.qiu@...rfivetech.com>
---
.../soc/starfive/starfive,jh7110-syscon.yaml | 67 +++++++++++++++++++
MAINTAINERS | 7 ++
2 files changed, 74 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
new file mode 100644
index 000000000000..26dc99cb0c89
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 SoC system controller
+
+maintainers:
+ - William Qiu <william.qiu@...rfivetech.com>
+
+description: |
+ The StarFive JH7110 SoC system controller provides register information such
+ as offset, mask and shift to configure related modules such as MMC and PCIe.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: starfive,jh7110-sys-syscon
+ - const: syscon
+ - const: simple-mfd
+ - items:
+ - enum:
+ - starfive,jh7110-aon-syscon
+ - starfive,jh7110-stg-syscon
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ clock-controller:
+ $ref: /schemas/clock/starfive,jh7110-pll.yaml#
+ type: object
+
+ "#power-domain-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,jh7110-aon-syscon
+ then:
+ required:
+ - "#power-domain-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@...40000 {
+ compatible = "starfive,jh7110-stg-syscon", "syscon";
+ reg = <0x10240000 0x1000>;
+ };
+
+ syscon@...30000 {
+ compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
+ reg = <0x13030000 0x1000>;
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 0fb4a703f66f..60bbc3a05d79 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20093,6 +20093,12 @@ S: Supported
F: Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml
F: drivers/clk/starfive/clk-starfive-jh7110-pll.*
+STARFIVE JH7110 SYSCON
+M: William Qiu <william.qiu@...rfivetech.com>
+M: Xingyu Wu <xingyu.wu@...rfivetech.com>
+S: Supported
+F: Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
+
STARFIVE JH71X0 CLOCK DRIVERS
M: Emil Renner Berthing <kernel@...il.dk>
M: Hal Feng <hal.feng@...rfivetech.com>
@@ -20130,6 +20136,7 @@ STARFIVE SOC DRIVERS
M: Conor Dooley <conor@...nel.org>
S: Maintained
T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
+F: Documentation/devicetree/bindings/soc/starfive/
F: drivers/soc/starfive/
STARFIVE TRNG DRIVER
--
2.25.1
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