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Message-ID: <ZF5LH91XDIh9ArfG@nimitz>
Date:   Fri, 12 May 2023 16:20:15 +0200
From:   Piotr Raczynski <piotr.raczynski@...el.com>
To:     "alexis.lothore@...tlin.com" <alexis.lothore@...tlin.com>
CC:     "andrew@...n.ch" <andrew@...n.ch>,
        "f.fainelli@...il.com" <f.fainelli@...il.com>,
        "olteanv@...il.com" <olteanv@...il.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "thomas.petazzoni@...tlin.com" <thomas.petazzoni@...tlin.com>,
        "herve.codina@...tlin.com" <herve.codina@...tlin.com>,
        "miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
        "milan.stevanovic@...com" <milan.stevanovic@...com>,
        "jimmy.lalande@...com" <jimmy.lalande@...com>,
        "pascal.eberhard@...com" <pascal.eberhard@...com>
Subject: Re: [PATCH net v3 1/3] net: dsa: rzn1-a5psw: enable management
 frames for CPU port

On Fri, May 12, 2023 at 09:27:10AM +0200, alexis.lothore@...tlin.com wrote:
> From: Clément Léger <clement.leger@...tlin.com>
> 
> Currently, management frame were discarded before reaching the CPU port due
> to a misconfiguration of the MGMT_CONFIG register. Enable them by setting
> the correct value in this register in order to correctly receive management
> frame and handle STP.
> 
> Fixes: 888cdb892b61 ("net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver")
> Signed-off-by: Clément Léger <clement.leger@...tlin.com>
> Signed-off-by: Alexis Lothoré <alexis.lothore@...tlin.com>
> ---
> Changes since v2:
> - move A5PSW_MGMT_CFG_ENABLE definition in this commit
> ---
Looks OK, thanks.
Reviewed-by: Piotr Raczynski <piotr.raczynski@...el.com>

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