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Message-ID: <7da331ea-28ce-120f-a261-b7a695aabe66@quicinc.com>
Date:   Fri, 12 May 2023 21:34:38 +0530
From:   Kathiravan T <quic_kathirav@...cinc.com>
To:     <andersson@...nel.org>, <agross@...nel.org>,
        <konrad.dybcio@...aro.org>, <mturquette@...libre.com>,
        <sboyd@...nel.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2] clk: qcom: ipq5332: fix the order of SLEEP_CLK and XO
 clock


On 4/17/2023 4:26 PM, Kathiravan T wrote:
> The order of DT_SLEEP_CLK and DT_XO are swapped and it is incorrect.
> Due to which the clocks for which the parent should be XO is having parent
> as SLEEP_CLK and vice versa. So fix the same by re-ordering the entries.


Gentle Reminder...


>
> Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
> Reported-by: Devi Priya <quic_devipriy@...cinc.com>
> Signed-off-by: Kathiravan T <quic_kathirav@...cinc.com>
> ---
> Changes in V2:
> 	- Added the Reported-by and Fixes tag
>
>   drivers/clk/qcom/gcc-ipq5332.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
> index 8cacbfb10c72..14096887d436 100644
> --- a/drivers/clk/qcom/gcc-ipq5332.c
> +++ b/drivers/clk/qcom/gcc-ipq5332.c
> @@ -20,8 +20,8 @@
>   #include "reset.h"
>   
>   enum {
> -	DT_SLEEP_CLK,
>   	DT_XO,
> +	DT_SLEEP_CLK,
>   	DT_PCIE_2LANE_PHY_PIPE_CLK,
>   	DT_PCIE_2LANE_PHY_PIPE_CLK_X1,
>   	DT_USB_PCIE_WRAPPER_PIPE_CLK,

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