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Message-ID: <da39b4a0-5bf9-c204-ee27-a7d3eebdc3f8@citrix.com>
Date:   Mon, 15 May 2023 15:14:41 +0100
From:   Andrew Cooper <andrew.cooper3@...rix.com>
To:     Borislav Petkov <bp@...en8.de>, X86 ML <x86@...nel.org>
Cc:     LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86/retbleed: Add __x86_return_thunk alignment checks

On 15/05/2023 3:07 pm, Borislav Petkov wrote:
> diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
> index 25f155205770..03c885d3640f 100644
> --- a/arch/x86/kernel/vmlinux.lds.S
> +++ b/arch/x86/kernel/vmlinux.lds.S
> @@ -508,4 +508,8 @@ INIT_PER_CPU(irq_stack_backing_store);
>             "fixed_percpu_data is not at start of per-cpu area");
>  #endif
>  
> +#ifdef CONFIG_RETHUNK
> +. = ASSERT((__x86_return_thunk & 0x3f) == 0, "__x86_return_thunk not cacheline-aligned");

Probably best to say 64b aligned.  The safety property is to do with the
layout of the BTB, not of a cacheline.

FWIW,

Reviewed-by: Andrew Cooper <andrew.cooper3@...rix.com>

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