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Message-ID: <20230515150722.12196-2-quic_anusha@quicinc.com>
Date: Mon, 15 May 2023 20:37:19 +0530
From: Anusha Rao <quic_anusha@...cinc.com>
To: <agross@...nel.org>, <andersson@...nel.org>,
<konrad.dybcio@...aro.org>, <thara.gopinath@...il.com>,
<herbert@...dor.apana.org.au>, <davem@...emloft.net>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <mturquette@...libre.com>,
<sboyd@...nel.org>, <p.zabel@...gutronix.de>,
<bhupesh.sharma@...aro.org>, <linux-arm-msm@...r.kernel.org>,
<linux-crypto@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_gokulsri@...cinc.com>,
<quic_sjaganat@...cinc.com>, <quic_kathirav@...cinc.com>,
<quic_arajkuma@...cinc.com>, <quic_poovendh@...cinc.com>
Subject: [PATCH V2 1/4] dt-bindings: clock: Add crypto clock and reset definitions
Add crypto clock and reset ID definitions for ipq9574.
Signed-off-by: Anusha Rao <quic_anusha@...cinc.com>
---
Changes in V2:
- Separated out the clock/reset binding changes to a new patch.
include/dt-bindings/clock/qcom,ipq9574-gcc.h | 4 ++++
include/dt-bindings/reset/qcom,ipq9574-gcc.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/include/dt-bindings/clock/qcom,ipq9574-gcc.h b/include/dt-bindings/clock/qcom,ipq9574-gcc.h
index 5a2961bfe893..86790efa10f0 100644
--- a/include/dt-bindings/clock/qcom,ipq9574-gcc.h
+++ b/include/dt-bindings/clock/qcom,ipq9574-gcc.h
@@ -210,4 +210,8 @@
#define GCC_SNOC_PCIE1_1LANE_S_CLK 201
#define GCC_SNOC_PCIE2_2LANE_S_CLK 202
#define GCC_SNOC_PCIE3_2LANE_S_CLK 203
+#define CRYPTO_CLK_SRC 204
+#define GCC_CRYPTO_CLK 205
+#define GCC_CRYPTO_AXI_CLK 206
+#define GCC_CRYPTO_AHB_CLK 207
#endif
diff --git a/include/dt-bindings/reset/qcom,ipq9574-gcc.h b/include/dt-bindings/reset/qcom,ipq9574-gcc.h
index d01dc6a24cf1..c709d103673d 100644
--- a/include/dt-bindings/reset/qcom,ipq9574-gcc.h
+++ b/include/dt-bindings/reset/qcom,ipq9574-gcc.h
@@ -160,5 +160,6 @@
#define GCC_WCSS_Q6_BCR 151
#define GCC_WCSS_Q6_TBU_BCR 152
#define GCC_TCSR_BCR 153
+#define GCC_CRYPTO_BCR 154
#endif
--
2.17.1
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