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Message-ID: <IA1PR20MB4953E8FFED81D5733DDFDA2DBB799@IA1PR20MB4953.namprd20.prod.outlook.com>
Date: Tue, 16 May 2023 10:37:13 +0800
From: Inochi Amaoto <inochiama@...look.com>
To: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Ian Rogers <irogers@...gle.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Nikita Shubin <n.shubin@...ro.com>
Cc: linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
linux-riscv@...ts.infradead.org,
Inochi Amaoto <inochiama@...look.com>
Subject: [PATCH 1/2] perf tools riscv: Allow get_cpuid return empty MARCH and MIMP
The T-HEAD C9xx series CPU only has MVENDOR defined, and left MARCH
and MIMP unimplemented.
To make perf support T-HEAD C9xx events. remove the restriction of
the MARCH and MIMP.
Signed-off-by: Inochi Amaoto <inochiama@...look.com>
---
tools/perf/arch/riscv/util/header.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/tools/perf/arch/riscv/util/header.c b/tools/perf/arch/riscv/util/header.c
index 4a41856938a8..031899c627f6 100644
--- a/tools/perf/arch/riscv/util/header.c
+++ b/tools/perf/arch/riscv/util/header.c
@@ -55,18 +55,13 @@ static char *_get_cpuid(void)
goto free;
} else if (!strncmp(line, CPUINFO_MARCH, strlen(CPUINFO_MARCH))) {
marchid = _get_field(line);
- if (!marchid)
- goto free;
} else if (!strncmp(line, CPUINFO_MIMP, strlen(CPUINFO_MIMP))) {
mimpid = _get_field(line);
- if (!mimpid)
- goto free;
-
break;
}
}
- if (!mvendorid || !marchid || !mimpid)
+ if (!mvendorid)
goto free;
if (asprintf(&cpuid, "%s-%s-%s", mvendorid, marchid, mimpid) < 0)
--
2.40.1
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