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Message-ID: <f0417d28-0c1a-f46e-9cbd-f20f2ac1e9f9@amd.com>
Date: Tue, 16 May 2023 09:29:38 -0500
From: "Limonciello, Mario" <mlimonci@....com>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>,
Mario Limonciello <mario.limonciello@....com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org,
S-k Shyam-sundar <Shyam-sundar.S-k@....com>,
Natikar Basavaraj <Basavaraj.Natikar@....com>,
Deucher Alexander <Alexander.Deucher@....com>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Iain Lane <iain@...ngesquash.org.uk>
Subject: Re: [PATCH] PCI: Only put >= 2015 root ports into D3 on Intel
On 5/16/2023 12:59 AM, Mika Westerberg wrote:
> +Rafael
>
> Hi Mario,
>
> On Mon, May 15, 2023 at 06:15:15PM -0500, Mario Limonciello wrote:
>> Using an XHCI device to wakeup the system from s2idle fails when
>> that XHCI device is connected to a USB-C port for an AMD USB4
>> router.
>>
>> Due to commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during
>> suspend") all root port go into D3 during s2idle.
>> When the root ports are in D3 over s2idle it's not possible for the
>> platform firmware to properly identify the wakeup source.
>>
>> As a user presses a key on a keyboard the APU will exit
>> hardware sleep, but no wake source will be active so the kernel will
>> let the APU enter back into a hardware sleep state.
>>
>> Here is an example of that sequence of events. The USB keyboard was
>> pressed after 11.9 seconds, and then a GPIO was triggered after
>> another 12 seconds.
>> ```
>> PM: suspend-to-idle
>> ACPI: EC: ACPI EC GPE status set
>> ACPI: PM: Rearming ACPI SCI for wakeup
>> amd_pmc AMDI0007:00: SMU idlemask s0i3: 0x8fff9eb5
>> Timekeeping suspended for 11.985 seconds
>> PM: Triggering wakeup from IRQ 9
>> ACPI: EC: ACPI EC GPE status set
>> ACPI: EC: ACPI EC GPE dispatched
>> ACPI: EC: ACPI EC work flushed
>> ACPI: EC: ACPI EC work flushed
>> ACPI: PM: Rearming ACPI SCI for wakeup
>> amd_pmc AMDI0007:00: SMU idlemask s0i3: 0x8fff9eb5
>> PM: Triggering wakeup from IRQ 9
>> ACPI: EC: ACPI EC GPE status set
>> ACPI: PM: Rearming ACPI SCI for wakeup
>> amd_pmc AMDI0007:00: SMU idlemask s0i3: 0x8fff9eb5
>> Timekeeping suspended for 12.916 seconds
>> PM: Triggering wakeup from IRQ 9
>> PM: Triggering wakeup from IRQ 7
>> ACPI: EC: ACPI EC GPE status set
>> ACPI: EC: ACPI EC GPE dispatched
>> ACPI: EC: ACPI EC work flushed
>> ACPI: PM: Wakeup after ACPI Notify sync
>> PM: resume from suspend-to-idle
>> ```
>>
>> If the root ports are in D0 during s2idle, then the wake source is
>> properly identified and an IRQ is active for the root port, waking
>> the system up.
>>
>> Here is the same sequence with root ports in D0. The USB keyboard
>> was pressed after 11 seconds.
>> ```
>> PM: suspend-to-idle
>> ACPI: EC: ACPI EC GPE status set
>> ACPI: PM: Rearming ACPI SCI for wakeup
>> amd_pmc AMDI0007:00: SMU idlemask s0i3: 0x8fff9eb5
>> Timekeeping suspended for 11.138 seconds
>> PM: Triggering wakeup from IRQ 9
>> ACPI: PM: ACPI non-EC GPE wakeup
>> PM: resume from suspend-to-idle
>> PM: Triggering wakeup from IRQ 40
>> ```
>>
>> Comparing registers between Linux and Windows 11 this behavior to put root
>> ports into D3 at suspend is unique to Linux. Windows does not put the
>> root ports into D3 over Modern Standby.
> Are you sure this is the case? Leaving the root port in D0 would mean
> its power resource is left on and that would leave the whole USB4 domain
> on consuming quite a lot of power.
Right - I had the same thought, but at least for AMD after the hardware
enters into s2idle
the platform does some internal management of power domains.
> The root ports involved are supposed
> to support PME from the D3hot/cold (this is what they advertise in their
> config spaces) which should allow the OS to move the port into low power
> states. Of course the PME from D3cold in general needs some ACPI support
> (typically a GPE) in the BIOS.
AFAICT the actual issue is entirely a wakeup platform firmware
sequencing issue
while in a hardware sleep state and not PMEs.
It's only exposed by putting the root ports into D3 over s2idle.
As an experiment on an unpatched kernel if I avoid letting amd-pmc bind
then the
hardware will never enter a hardware sleep state over Linux s2idle and
this issue
doesn't occur.
That shows that PMEs *do* work from D3cold.
With all of this I have to wonder if the Windows behavior of what to do
with the root
ports is tied to the uPEP requirements specified in the firmware.
Linux doesn't do any enforcement or adjustments from what uPEP indicates.
The uPEP constraints for the root port in question in an affected AMD
system has:
Package (0x04)
{
Zero,
"\\_SB.PCI0.GP19",
Zero,
Zero
},
AMD's parsing is through 'lpi_device_get_constraints_amd' so that
structure shows
as not enabled and doesn't specify any D-state requirements.
What do they specify for Intel on a matching root port?
>> As this policy change to put root ports into D3 if they're manufactured
>> after 2015 was originally introduced for Intel systems narrow it down to
>> only apply there.
>>
>> Reported-by: Iain Lane <iain@...ngesquash.org.uk>
>> Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-suspend-with-external-USB-keyboard/m-p/5217121
>> Signed-off-by: Mario Limonciello <mario.limonciello@....com>
>> ---
>> drivers/pci/pci.c | 11 ++++++++---
>> 1 file changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
>> index 5ede93222bc1..7d1b078b8d40 100644
>> --- a/drivers/pci/pci.c
>> +++ b/drivers/pci/pci.c
>> @@ -3010,12 +3010,17 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
>> if (dmi_check_system(bridge_d3_blacklist))
>> return false;
>>
>> +#ifdef CONFIG_X86
>> /*
>> - * It should be safe to put PCIe ports from 2015 or newer
>> - * to D3.
>> + * It should be safe to put PCIe ports from Intel systems
>> + * from 2015 or newer to D3.
>> + * Windows 11 does not do this over Modern Standby and this is
>> + * known to cause problems with s2idle on some AMD systems.
>> */
>> - if (dmi_get_bios_year() >= 2015)
>> + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
> Can't we then check here AMD case instead? Then generic case would be to
> support according what the port announces.
Right; that was my original patch, but given the Windows behavior I
figured it was better
to discuss if the original patch was actually correct or not.
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