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Message-ID: <CAHCN7x+o=jYJsvKr3b-WB3o2=nHtMZU7CvvVu62mVU5UPGT1pg@mail.gmail.com>
Date: Tue, 16 May 2023 21:57:07 -0500
From: Adam Ford <aford173@...il.com>
To: Marek Szyprowski <m.szyprowski@...sung.com>
Cc: dri-devel@...ts.freedesktop.org, aford@...conembedded.com,
Andrzej Hajda <andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Robert Foss <rfoss@...nel.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Inki Dae <inki.dae@...sung.com>,
Jagan Teki <jagan@...rulasolutions.com>,
Frieder Schrempf <frieder.schrempf@...tron.de>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH V6 0/6] drm: bridge: samsung-dsim: Support variable clocking
On Tue, May 16, 2023 at 5:57 PM Marek Szyprowski
<m.szyprowski@...sung.com> wrote:
>
> On 16.05.2023 01:57, Adam Ford wrote:
> > This series fixes the blanking pack size and the PMS calculation. It then
> > adds support to allows the DSIM to dynamically DPHY clocks, and support
> > non-burst mode while allowing the removal of the hard-coded clock values
> > for the PLL for imx8m mini/nano/plus, and it allows the removal of the
> > burst-clock device tree entry when burst-mode isn't supported by connected
> > devices like an HDMI brige. In that event, the HS clock is set to the
> > value requested by the bridge chip.
> >
> > This has been tested on both an i.MX8M Nano and i.MX8M Plus, and should
> > work on i.MX8M Mini as well. Marek Szyprowski has tested it on various
> > Exynos boards.
> >
> > Adam Ford (5):
> > drm: bridge: samsung-dsim: Fix PMS Calculator on imx8m[mnp]
> > drm: bridge: samsung-dsim: Fetch pll-clock-frequency automatically
> > drm: bridge: samsung-dsim: Select GENERIC_PHY_MIPI_DPHY
> > drm: bridge: samsung-dsim: Dynamically configure DPHY timing
> > drm: bridge: samsung-dsim: Support non-burst mode
> >
> > Lucas Stach (1):
> > drm: bridge: samsung-dsim: fix blanking packet size calculation
> >
> > drivers/gpu/drm/bridge/Kconfig | 1 +
> > drivers/gpu/drm/bridge/samsung-dsim.c | 143 +++++++++++++++++++++-----
> > include/drm/bridge/samsung-dsim.h | 4 +
> > 3 files changed, 125 insertions(+), 23 deletions(-)
>
> Feel free to add to all patches:
>
> Tested-by: Marek Szyprowski <m.szyprowski@...sung.com>
Thanks for all your help testing. I hope the V7 will be the last
attempt. I've fixed the repeated declaration in patch 6, and added
your t-b statements to each of the patches with code changes.
I'm hoping to push V7 in a day or two pending any more feedback.
adam
>
>
> > V6: Squash-in an additional error fix from Lucas Stach regarding the
> > DPHY calcuations. Remove the dynamic_dphy variable and let
> > everyone use the new calculations. Move the hs_clock caching
> > from patch 6 to patch 5 to go along with the DPHY calcuations
> > since they are now based on the recorded hs_clock rate.
> >
> > V5: Update error message to dev_info and change them to indicate
> > what is happening without sounding like an error when optional
> > device tree entries are missing.
> >
> > V4: Undo some accidental whitespace changes, rename PS_TO_CYCLE
> > variables to ps and hz from PS and MHz. Remove if check
> > before the samsung_dsim_set_phy_ctrl call since it's
> > unnecessary.
> > Added additional tested-by and reviewed-by comments.
> > Squash patches 6 and 7 together since the supporting
> > non-burst (patch 6) mode doesn't really work until
> > patch 7 was applied.
> >
> > V3: When checking if the bust-clock is present, only check for it
> > in the device tree, and don't check the presence of the
> > MIPI_DSI_MODE_VIDEO_BURST flag as it breaks an existing Exynos
> > board.
> >
> > Add a new patch to the series to select GENERIC_PHY_MIPI_DPHY in
> > Kconfig otherwise the build breaks on the 32-bit Exynos.
> >
> > Change vco_min variable name to min_freq
> >
> > Added tested-by from Chen-Yu Tsai
> >
> > V2: Instead of using my packet blanking calculation, this integrates
> > on from Lucas Stach which gets modified later in the series to
> > cache the value of the HS-clock instead of having to do the
> > calucations again.
> >
> > Instead of completely eliminating the PLL clock frequency from
> > the device tree, this makes it optional to avoid breaking some
> > Samsung devices. When the samsung,pll-clock-frequency is not
> > found, it reads the value of the clock named "sclk_mipi"
> > This also maintains backwards compatibility with older device
> > trees.
> >
> > This also changes the DPHY calcuation from a Look-up table,
> > a reverse engineered algorithm which uses
> > phy_mipi_dphy_get_default_config to determine the standard
> > nominal values and calculates the cycles necessary to update
> > the DPHY timings accordingly.
> >
>
> Best regards
> --
> Marek Szyprowski, PhD
> Samsung R&D Institute Poland
>
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