linux-kernel - [PATCH v2 8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC

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Message-Id: <20230518184541.2627-9-jszhang@kernel.org>
Date:   Fri, 19 May 2023 02:45:40 +0800
From:   Jisheng Zhang <jszhang@...nel.org>
To:     Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>, Guo Ren <guoren@...nel.org>
Cc:     linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org, Yangtao Li <frank.li@...o.com>,
        Wei Fu <wefu@...hat.com>, Icenowy Zheng <uwu@...nowy.me>
Subject: [PATCH v2 8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC

Currently, I would like to maintain the T-HEAD RISC-V SoC support.

Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
---
 MAINTAINERS | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index e0ad886d3163..6df20c65798a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18162,6 +18162,12 @@ F:	drivers/perf/riscv_pmu.c
 F:	drivers/perf/riscv_pmu_legacy.c
 F:	drivers/perf/riscv_pmu_sbi.c
 
+RISC-V THEAD SoC SUPPORT
+M:	Jisheng Zhang <jszhang@...nel.org>
+L:	linux-riscv@...ts.infradead.org
+S:	Maintained
+F:	arch/riscv/boot/dts/thead/
+
 RNBD BLOCK DRIVERS
 M:	Md. Haris Iqbal <haris.iqbal@...os.com>
 M:	Jack Wang <jinpu.wang@...os.com>
-- 
2.40.0