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Message-Id: <20230518113800.339158-1-srinivas.kandagatla@linaro.org>
Date: Thu, 18 May 2023 12:37:55 +0100
From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To: andersson@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org
Cc: johan+linaro@...nel.org, agross@...nel.org,
konrad.dybcio@...aro.org, mturquette@...libre.com,
sboyd@...nel.org, conor+dt@...nel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: [PATCH 0/5] clk: qcom: sc8280xp: add lpasscc reset control
On SC8280XP, LPASS IP is controlled by q6dsp, however the reset lines
required by some of the IPs like Soundwire still need to be programmed from
Apps processor. This patchset adds support to reset controller on LPASS
CC and LPASS AudioCC.
Tested on X13s.
Thanks,
Srini
Srinivas Kandagatla (5):
dt-bindings: clock: Add YAML schemas for LPASSCC and reset on SC8280XP
dt-bindings: clock: Add YAML schemas for LPASS AUDIOCC and reset on
SC8280XP
clk: qcom: Add lpass clock controller driver for SC8280XP
clk: qcom: Add lpass audio clock controller driver for SC8280XP
arm64: dts: qcom: sc8280xp: add resets for soundwire controllers
.../bindings/clock/qcom,sc8280xp-lpasscc.yaml | 68 ++++++++++++++
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 19 ++++
drivers/clk/qcom/Kconfig | 8 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/lpasscc-sc8280xp.c | 94 +++++++++++++++++++
.../dt-bindings/clock/qcom,lpasscc-sc8280xp.h | 17 ++++
6 files changed, 207 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
create mode 100644 drivers/clk/qcom/lpasscc-sc8280xp.c
create mode 100644 include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h
--
2.25.1
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