linux-kernel - Re: [PATCH V6 5/6] drm: bridge: samsung-dsim: Dynamically configure DPHY timing

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Date:   Thu, 18 May 2023 17:35:46 +0530
From:   Jagan Teki <jagan@...rulasolutions.com>
To:     Adam Ford <aford173@...il.com>
Cc:     dri-devel@...ts.freedesktop.org, aford@...conembedded.com,
        Lucas Stach <l.stach@...gutronix.de>,
        Chen-Yu Tsai <wenst@...omium.org>,
        Frieder Schrempf <frieder.schrempf@...tron.de>,
        Michael Walle <michael@...le.cc>,
        Andrzej Hajda <andrzej.hajda@...el.com>,
        Neil Armstrong <neil.armstrong@...aro.org>,
        Robert Foss <rfoss@...nel.org>,
        Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
        Jonas Karlman <jonas@...boo.se>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        David Airlie <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        Inki Dae <inki.dae@...sung.com>,
        Marek Szyprowski <m.szyprowski@...sung.com>,
        Marek Vasut <marex@...x.de>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V6 5/6] drm: bridge: samsung-dsim: Dynamically configure
 DPHY timing

On Tue, May 16, 2023 at 5:27 AM Adam Ford <aford173@...il.com> wrote:
>
> The DPHY timings are currently hard coded. Since the input
> clock can be variable, the phy timings need to be variable
> too.  To facilitate this, we need to cache the hs_clock
> based on what is generated from the PLL.
>
> The phy_mipi_dphy_get_default_config_for_hsclk function
> configures the DPHY timings in pico-seconds, and a small macro
> converts those timings into clock cycles based on the hs_clk.
>
> Signed-off-by: Adam Ford <aford173@...il.com>
> Signed-off-by: Lucas Stach <l.stach@...gutronix.de>
> Tested-by: Chen-Yu Tsai <wenst@...omium.org>
> Tested-by: Frieder Schrempf <frieder.schrempf@...tron.de>
> Reviewed-by: Frieder Schrempf <frieder.schrempf@...tron.de>
> Tested-by: Michael Walle <michael@...le.cc>
> ---

Tested-by: Jagan Teki <jagan@...rulasolutions.com> # imx8mm-icore