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Message-ID: <21c6e223-d482-b272-68c9-c442ea834777@redhat.com>
Date: Fri, 19 May 2023 19:56:02 +0200
From: Paolo Bonzini <pbonzini@...hat.com>
To: Mingwei Zhang <mizhang@...gle.com>,
Sean Christopherson <seanjc@...gle.com>
Cc: "H. Peter Anvin" <hpa@...or.com>, kvm@...r.kernel.org,
linux-kernel@...r.kernel.org, Jim Mattson <jmattson@...gle.com>
Subject: Re: [PATCH v3] KVM: VMX: add MSR_IA32_TSX_CTRL into msrs_to_save
On 5/9/23 05:23, Mingwei Zhang wrote:
> Add MSR_IA32_TSX_CTRL into msrs_to_save[] to explicitly tell userspace to
> save/restore the register value during migration. Missing this may cause
> userspace that relies on KVM ioctl(KVM_GET_MSR_INDEX_LIST) fail to port the
> value to the target VM.
>
> In addition, there is no need to add MSR_IA32_TSX_CTRL when
> ARCH_CAP_TSX_CTRL_MSR is not supported in kvm_get_arch_capabilities(). So
> add the checking in kvm_probe_msr_to_save().
>
> Fixes: c11f83e0626b ("KVM: vmx: implement MSR_IA32_TSX_CTRL disable RTM functionality")
> Reported-by: Jim Mattson <jmattson@...gle.com>
> Signed-off-by: Mingwei Zhang <mizhang@...gle.com>
> ---
> arch/x86/kvm/x86.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 237c483b1230..c8accbd6c861 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -1431,7 +1431,7 @@ static const u32 msrs_to_save_base[] = {
> #endif
> MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
> MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
> - MSR_IA32_SPEC_CTRL,
> + MSR_IA32_SPEC_CTRL, MSR_IA32_TSX_CTRL,
> MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
> MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
> MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
> @@ -7077,6 +7077,10 @@ static void kvm_probe_msr_to_save(u32 msr_index)
> if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
> return;
> break;
> + case MSR_IA32_TSX_CTRL:
> + if (!(kvm_get_arch_capabilities() & ARCH_CAP_TSX_CTRL_MSR))
> + return;
> + break;
> default:
> break;
> }
Queued, thanks.
Paolo
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