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Message-ID: <20230519-decidable-prelude-2f0d58041f02@spud>
Date: Fri, 19 May 2023 20:13:44 +0100
From: Conor Dooley <conor@...nel.org>
To: Thippeswamy Havalige <thippeswamy.havalige@....com>
Cc: krzysztof.kozlowski@...aro.org, devicetree@...r.kernel.org,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
robh+dt@...nel.org, bhelgaas@...gle.com, lorenzo.pieralisi@....com,
linux-arm-kernel@...ts.infradead.org, bharat.kumar.gogada@....com,
michals@....com, nagaradhesh.yeleswarapu@....com
Subject: Re: [PATCH v3 2/3] dt-bindings: PCI: xilinx-xdma: Add YAML schemas
for Xilinx XDMA PCIe Root Port Bridge
On Fri, May 19, 2023 at 04:29:00PM +0530, Thippeswamy Havalige wrote:
> Add YAML dtschemas of Xilinx XDMA Soft IP PCIe Root Port Bridge
> dt binding.
>
> Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@....com>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@....com>
Looks like you might've forgotten a Co-developed-by?
> diff --git a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
> +properties:
> + compatible:
> + const: xlnx,xdma-host-3.00
Perhaps not a question for you Thippeswamy, but is there a reason for
PCI root ports not having any soc-specific compatibles? Rob (if you see
this when you're back)?
> + interrupt-controller ;
Looks like you didn't see Michal's comment about the extra space.
If you resubmit for some other reason, you should fix that in the
process :)
Cheers,
Conor.
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