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Message-Id: <20230519214813.2593271-12-bhupesh.sharma@linaro.org>
Date: Sat, 20 May 2023 03:18:13 +0530
From: Bhupesh Sharma <bhupesh.sharma@...aro.org>
To: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org
Cc: agross@...nel.org, linux-kernel@...r.kernel.org,
linux-crypto@...r.kernel.org, andersson@...nel.org,
bhupesh.sharma@...aro.org, bhupesh.linux@...il.com,
krzysztof.kozlowski@...aro.org, robh+dt@...nel.org,
konrad.dybcio@...aro.org, vladimir.zapolskiy@...aro.org,
rfoss@...nel.org, neil.armstrong@...aro.org, djakov@...nel.org,
stephan@...hold.net, Anders Roxell <anders.roxell@...aro.org>,
Linux Kernel Functional Testing <lkft@...aro.org>
Subject: [PATCH v7 11/11] arm64: dts: qcom: sm8450: add crypto nodes
From: Neil Armstrong <neil.armstrong@...aro.org>
Add crypto engine (CE) and CE BAM related nodes and definitions
for the SM8450 SoC.
Tested-by: Anders Roxell <anders.roxell@...aro.org>
Tested-by: Linux Kernel Functional Testing <lkft@...aro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
[Bhupesh: Corrected the compatible list]
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 595533aeafc4..1c65f7dc67f2 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4138,6 +4138,34 @@ ufs_mem_phy_lanes: phy@...7400 {
};
};
+ cryptobam: dma-controller@...4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x28000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x584 0x11>,
+ <&apps_smmu 0x588 0x0>,
+ <&apps_smmu 0x598 0x5>,
+ <&apps_smmu 0x59a 0x0>,
+ <&apps_smmu 0x59f 0x0>;
+ };
+
+ crypto: crypto@...0000 {
+ compatible = "qcom,sm8450-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x584 0x11>,
+ <&apps_smmu 0x588 0x0>,
+ <&apps_smmu 0x598 0x5>,
+ <&apps_smmu 0x59a 0x0>,
+ <&apps_smmu 0x59f 0x0>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "memory";
+ };
+
sdhc_2: mmc@...4000 {
compatible = "qcom,sm8450-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x08804000 0 0x1000>;
--
2.38.1
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