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Message-ID: <alpine.DEB.2.21.2305192342180.27887@angie.orcam.me.uk>
Date: Fri, 19 May 2023 23:51:40 +0100 (BST)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
cc: "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
linux-kernel@...r.kernel.org,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Subject: Re: [PATCH 1/3] MIPS: Introduce WAR_4KC_LLSC config option
On Fri, 19 May 2023, Jiaxun Yang wrote:
> > Given the circumstances I think this should be `panic'. You don't want
> > to continue with a system that can randomly lock up.
>
> I just checked how other architectures handle such situation, it seems like
> TAINT_CPU_OUT_OF_SPEC is a better option.
That can be easily missed, just as a random message in the kernel log,
even at a high priority, and LOGLEVEL_ERR is not particularly high even.
For a system configuration that qualifies as not usable for any practical
purpose I find this approach leaving something to desire.
> Panic in cpu_probe can be frustrating for users as it is earlier than initialisation
> of consoles so the panic message can never be read by users.
Is there no early console support for the systems affected?
Maciej
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