linux-kernel - Re: [PATCH V4 1/3] dt-bindings: clock: qcom: Add SM8450 video clock controller

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Message-ID: <19eef429-1fca-c603-f97d-16424a10d9b7@quicinc.com>
Date:   Fri, 19 May 2023 16:25:31 +0530
From:   Taniya Das <quic_tdas@...cinc.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Andy Gross <agross@...nel.org>,
        "Michael Turquette" <mturquette@...libre.com>
CC:     Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <quic_skakitap@...cinc.com>, <quic_jkona@...cinc.com>
Subject: Re: [PATCH V4 1/3] dt-bindings: clock: qcom: Add SM8450 video clock
 controller

Thanks for the review.

On 5/10/2023 12:42 PM, Krzysztof Kozlowski wrote:
> On 09/05/2023 19:21, Taniya Das wrote:
>> Add device tree bindings for the video clock controller on Qualcomm
>> SM8450 platform.
>>
>> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
>> Reviewed-by: Rob Herring <robh@...nel.org>
>> ---
>> Changes since V3:
>>   - None.
>>
>> Changes since V2:
>>   - As per Stephen's comments drop clock-names to match how newer
>>     qcom clk bindings are being done.
>>   - Change the header file name as qcom,sm8450-videocc.h to match
>>     latest upstream header files.
>>
>> Changes since V1:
>>   - Change the properties order to keep reg after the compatible
>>     property.
>>
>>   .../bindings/clock/qcom,sm8450-videocc.yaml   | 77 +++++++++++++++++++
>>   .../dt-bindings/clock/qcom,sm8450-videocc.h   | 38 +++++++++
>>   2 files changed, 115 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
>>   create mode 100644 include/dt-bindings/clock/qcom,sm8450-videocc.h
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
>> new file mode 100644
>> index 000000000000..58e59065bb2a
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
>> @@ -0,0 +1,77 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Video Clock & Reset Controller on SM8450
>> +
>> +maintainers:
>> +  - Taniya Das <quic_tdas@...cinc.com>
>> +
>> +description: |
>> +  Qualcomm video clock control module provides the clocks, resets and power
>> +  domains on SM8450.
>> +
>> +  See also:: include/dt-bindings/clock/qcom,videocc-sm8450.h
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,sm8450-videocc
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    items:
>> +      - description: Video AHB clock from GCC
>> +      - description: Board XO source
> 
> Why the order is different than all other devices? Board XO is always first.
> 
>

Yes, will be fixed in the next patch set.


> Best regards,
> Krzysztof
> 

-- 
Thanks & Regards,
Taniya Das.