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Message-Id: <20230517-topic-a7xx_prep-v2-0-5b9daa2b2cf0@linaro.org>
Date: Fri, 19 May 2023 15:29:05 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>,
Jonathan Marek <jonathan@...ek.ca>,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH v2 0/6] Adreno QoL changes
This series brings some niceties in preparation for A7xx introduction.
It should be fully independent of the GMU wrapper series.
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
Changes in v2:
- Drop switching to using the GMU_AO counter in timestamp
- Add a definition for REG_A6XX_GMU_AHB_FENCE_STATUS_CLR, may be subbed
with a register sync after mesa MR22901
- Link to v1: https://lore.kernel.org/r/20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org
---
Konrad Dybcio (6):
drm/msm/a6xx: Add REG_A6XX_GMU_AHB_FENCE_STATUS_CLR definition
drm/msm/a6xx: Explain CP_PROTECT_CNTL writes in a6xx_set_cp_protect
drm/msm/a6xx: Skip empty protection ranges entries
drm/msm/a6xx: Ensure clean GMU state in a6xx_gmu_fw_start
drm/msm/a6xx: Improve GMU force shutdown sequence
drm/msm/a6xx: Fix up GMU region reservations
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 21 +++++++++++++++++----
drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 2 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 14 +++++++++-----
3 files changed, 28 insertions(+), 9 deletions(-)
---
base-commit: dbd91ef4e91c1ce3a24429f5fb3876b7a0306733
change-id: 20230517-topic-a7xx_prep-787a69c7d0ff
Best regards,
--
Konrad Dybcio <konrad.dybcio@...aro.org>
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