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Message-ID: <291695ff-cb34-99f6-2e29-4b7390532b6a@gmail.com>
Date:   Fri, 19 May 2023 19:56:00 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     alexis.lothore@...tlin.com, Andrew Lunn <andrew@...n.ch>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Richard Cochran <richardcochran@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Russell King <linux@...linux.org.uk>
Cc:     netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com,
        paul.arola@...us.com, scott.roberts@...us.com,
        Marek Behún <kabel@...nel.org>
Subject: Re: [PATCH net-next v2 6/7] net: dsa: mv88e6xxx: pass mv88e6xxx_chip
 structure to port_max_speed_mode



On 5/19/2023 7:13 AM, alexis.lothore@...tlin.com wrote:
> From: Alexis Lothoré <alexis.lothore@...tlin.com>
> 
> Some switches families have minor differences on supported link speed for
> ports. Instead of redefining a new port_max_speed_mode for each different
> configuration, allow to pass mv88e6xxx_chip structure to allow
> differentiating those chips by known chip id
> 
> Signed-off-by: Alexis Lothoré <alexis.lothore@...tlin.com>

Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
-- 
Florian

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