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Date:   Mon, 22 May 2023 21:46:07 +0100
From:   Jiaxun Yang <jiaxun.yang@...goat.com>
To:     "Maciej W. Rozycki" <macro@...am.me.uk>
Cc:     "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
        linux-kernel@...r.kernel.org,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Subject: Re: [PATCH 1/3] MIPS: Introduce WAR_4KC_LLSC config option



> 2023年5月19日 23:51,Maciej W. Rozycki <macro@...am.me.uk> 写道:
> 
> On Fri, 19 May 2023, Jiaxun Yang wrote:
> 
>>> Given the circumstances I think this should be `panic'.  You don't want 
>>> to continue with a system that can randomly lock up.
>> 
>> I just checked how other architectures handle such situation, it seems like
>> TAINT_CPU_OUT_OF_SPEC is a better option.
> 
> That can be easily missed, just as a random message in the kernel log, 
> even at a high priority, and LOGLEVEL_ERR is not particularly high even.  
> For a system configuration that qualifies as not usable for any practical 
> purpose I find this approach leaving something to desire.

Just found another reason that not to panic in such situation when I’m playing
around QEMU.

Emulation software like QEMU, mipssim, OVPSim, IASIM tends use base PRID
of a core. It can be more than annoying for people to find kernel suddenly won’t
boot on their simulator.

> 
>> Panic in cpu_probe can be frustrating for users as it is earlier than initialisation
>> of consoles so the panic message can never be read by users.
> 
> Is there no early console support for the systems affected?

For routers it’s very common that serial port available to user is not the same one
as we hooked for earlyprintk.

For QEMU users potentially using graphic interface, initialisation of DRM/FBDEV
comes very later.

Thanks
- Jiaxun

> 
>  Maciej

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