linux-kernel - Re: [PATCH V2 2/6] perf: Add branch stack extension

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Message-ID: <2f09023a-cccb-35df-da0a-d245ee5238be@linux.intel.com>
Date:   Tue, 23 May 2023 09:08:02 -0400
From:   "Liang, Kan" <kan.liang@...ux.intel.com>
To:     Sandipan Das <sandipan.das@....com>,
        Peter Zijlstra <peterz@...radead.org>
Cc:     linux-kernel@...r.kernel.org, mingo@...hat.com, acme@...nel.org,
        mark.rutland@....com, alexander.shishkin@...ux.intel.com,
        jolsa@...nel.org, namhyung@...nel.org, irogers@...gle.com,
        adrian.hunter@...el.com, ak@...ux.intel.com, eranian@...gle.com,
        alexey.v.bayduraev@...ux.intel.com, tinghao.zhang@...el.com,
        Ravi Bangoria <ravi.bangoria@....com>,
        Athira Rajeev <atrajeev@...ux.vnet.ibm.com>
Subject: Re: [PATCH V2 2/6] perf: Add branch stack extension



On 2023-05-23 2:03 a.m., Sandipan Das wrote:
> Hi Kan,
> 
> On 5/22/2023 5:00 PM, kan.liang@...ux.intel.com wrote:
>> From: Kan Liang <kan.liang@...ux.intel.com>
>>
>> Currently, the extra information of a branch entry is stored in a u64
>> space. With more and more information added, the space is running out.
>> For example, the information of occurrences of events will be added for
>> each branch.
>>
>> Add an extension space to record the new information for each branch
>> entry. The space is appended after the struct perf_branch_stack.
>>
>> Add a bit in struct perf_branch_entry to indicate whether the extra
>> information is included.
>>
>> Reviewed-by: Andi Kleen <ak@...ux.intel.com>
>> Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
>> Cc: Sandipan Das <sandipan.das@....com>
>> Cc: Ravi Bangoria <ravi.bangoria@....com>
>> Cc: Athira Rajeev <atrajeev@...ux.vnet.ibm.com>
>> ---
>>
>> New patch
>> - Introduce a generic extension space which can be used to
>>   store the LBR event information for Intel. It can also be used by
>>   other ARCHs for the other purpose.
>> - Add a new bit in struct perf_branch_entry to indicate whether the
>>   extra information is included.
>>
>>  arch/powerpc/perf/core-book3s.c |  2 +-
>>  arch/x86/events/amd/core.c      |  2 +-
>>  arch/x86/events/intel/core.c    |  2 +-
>>  arch/x86/events/intel/ds.c      |  4 ++--
>>  include/linux/perf_event.h      | 18 +++++++++++++++++-
>>  include/uapi/linux/perf_event.h |  4 +++-
>>  kernel/events/core.c            |  5 +++++
>>  7 files changed, 30 insertions(+), 7 deletions(-)
>>
> 
> This seems to be missing the following:

Oh, right, the patch set based on the perf/core branch which doesn't
include the latest fix, 90befef5a9e8 ("perf/x86: Fix missing sample size
update on AMD BRS").

Peter,

Could you please backport the 90befef5a9e8 to your perf/core branch?
Then I will fold the below change into V3.
Or should I rebase the patch set on top of perf/urgent?


> 
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 6310fc5c9f52..b6739f63dc34 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -1704,7 +1704,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)
>                 perf_sample_data_init(&data, 0, event->hw.last_period);
> 
>                 if (has_branch_stack(event))
> -                       perf_sample_save_brstack(&data, event, &cpuc->lbr_stack);
> +                       perf_sample_save_brstack(&data, event, &cpuc->lbr_stack, NULL);
> 
>                 if (perf_event_overflow(event, &data, regs))
>                         x86_pmu_stop(event, 0);
> 
> 
> Otherwise, the changes look good to me.
> 
> Reviewed-by: Sandipan Das <sandipan.das@....com>


Thanks!

Kan