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Message-ID: <20230524202135.GA3447678@hirez.programming.kicks-ass.net>
Date:   Wed, 24 May 2023 22:21:35 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     "Liang, Kan" <kan.liang@...ux.intel.com>
Cc:     Stephane Eranian <eranian@...gle.com>, mingo@...hat.com,
        linux-kernel@...r.kernel.org, ak@...ux.intel.com,
        stable@...r.kernel.org
Subject: Re: [PATCH] perf/x86/uncore: Correct the number of CHAs on SPR

On Wed, May 24, 2023 at 03:10:00PM -0400, Liang, Kan wrote:
> Hi Peter,
> 
> On 2023-05-08 12:16 p.m., Stephane Eranian wrote:
> > On Mon, May 8, 2023 at 7:05 AM <kan.liang@...ux.intel.com> wrote:
> >>
> >> From: Kan Liang <kan.liang@...ux.intel.com>
> >>
> >> The number of CHAs from the discovery table on some SPR variants is
> >> incorrect, because of a firmware issue. An accurate number can be read
> >> from the MSR UNC_CBO_CONFIG.
> >>
> >> Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support")
> >> Reported-by: Stephane Eranian <eranian@...gle.com>
> >> Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
> > 
> > Tested-by: Stephane Eranian <eranian@...gle.com>
> >
> 
> Gentle ping.

Urgh, too much email.. Queued for perf/urgent.

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