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Message-ID: <28a4d1e6-224d-9ecb-6b94-cffc3ecb408d@quicinc.com>
Date:   Wed, 24 May 2023 10:57:28 +0530
From:   Anusha Canchi <quic_anusha@...cinc.com>
To:     <bhupesh.sharma@...aro.org>, <agross@...nel.org>,
        <andersson@...nel.org>, <konrad.dybcio@...aro.org>,
        <thara.gopinath@...il.com>, <herbert@...dor.apana.org.au>,
        <davem@...emloft.net>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
        <mturquette@...libre.com>, <sboyd@...nel.org>,
        <p.zabel@...gutronix.de>, <linux-arm-msm@...r.kernel.org>,
        <linux-crypto@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <quic_srichara@...cinc.com>, <quic_gokulsri@...cinc.com>,
        <quic_sjaganat@...cinc.com>, <quic_kathirav@...cinc.com>,
        <quic_arajkuma@...cinc.com>, <quic_poovendh@...cinc.com>
Subject: Re: [PATCH V3 4/4] arm64: dts: qcom: ipq9574: Enable crypto nodes



On 5/22/2023 2:23 PM, bhupesh.sharma@...aro.org wrote:
> On 5/18/23 7:41 PM, Anusha Rao <quic_anusha@...cinc.com> wrote:
>> Enable crypto support for ipq9574.
>>
>> Signed-off-by: Anusha Rao <quic_anusha@...cinc.com>
>> ---
>>   Changes in V3:
>>     - No change.
>>
>>   arch/arm64/boot/dts/qcom/ipq9574.dtsi | 20 ++++++++++++++++++++
>>   1 file changed, 20 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi 
>> b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> index fea15f3cf910..6e52d35a6a15 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> @@ -123,6 +123,26 @@
>>               clock-names = "core";
>>           };
>>   +        cryptobam: dma-controller@...000 {
>> +            compatible = "qcom,bam-v1.7.0";
>
> Please confirm if this is "qcom,bam-v1.7.4" or "qcom,bam-v1.7.0". If 
> "qcom,bam-v1.7.4" please use the newer compatible format.
Sure, will update.

Thanks,
Anusha
>
> Thanks,
> Bhupesh
>
>> +            reg = <0x00704000 0x20000>;
>> +            interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
>> +            #dma-cells = <1>;
>> +            qcom,ee = <1>;
>> +            qcom,controlled-remotely;
>> +        };
>> +
>> +        crypto: crypto@...000 {
>> +            compatible = "qcom,ipq9574-qce", "qcom,ipq4019-qce", 
>> "qcom,qce";
>> +            reg = <0x0073a000 0x6000>;
>> +            clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
>> +                 <&gcc GCC_CRYPTO_AXI_CLK>,
>> +                 <&gcc GCC_CRYPTO_CLK>;
>> +            clock-names = "iface", "bus", "core";
>> +            dmas = <&cryptobam 2>, <&cryptobam 3>;
>> +            dma-names = "rx", "tx";
>> +        };
>> +
>>           tlmm: pinctrl@...0000 {
>>               compatible = "qcom,ipq9574-tlmm";
>>               reg = <0x01000000 0x300000>;
>>

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