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Message-Id: <20230524061634.54141-1-chao.gao@intel.com>
Date: Wed, 24 May 2023 14:16:30 +0800
From: Chao Gao <chao.gao@...el.com>
To: kvm@...r.kernel.org, x86@...nel.org
Cc: xiaoyao.li@...el.com, Chao Gao <chao.gao@...el.com>,
Alexandre Chartre <alexandre.chartre@...cle.com>,
Ashok Raj <ashok.raj@...el.com>,
Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>,
Juergen Gross <jgross@...e.com>,
Kim Phillips <kim.phillips@....com>,
linux-kernel@...r.kernel.org, Paolo Bonzini <pbonzini@...hat.com>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
Peter Zijlstra <peterz@...radead.org>,
Sean Christopherson <seanjc@...gle.com>,
Thomas Gleixner <tglx@...utronix.de>
Subject: [PATCH v2 0/3] MSR_IA32_ARCH_CAPABILITIES cleanups
Do some cleanups about MSR_IA32_ARCH_CAPABILITIES in KVM e.g, fix stale
comments, elimite open-coded MSR reads, track features that can be exposed to
guests to avoid computing them runtime. They are found when reading the code.
No functional change intented.
Changes from v1 -> v2:
1. toggle ARCH_CAP_SKIP_VMENTRY_L1DFLUSH bit when l1tf mitigation state is
changed by module param. [Xiaoyao, Sean]
2. add more cleanups (patch 2/3)
Chao Gao (3):
KVM: x86: Track supported ARCH_CAPABILITIES in kvm_caps
KVM: x86: Correct the name for skipping VMENTER l1d flush
x86/cpu, KVM: Use helper function to read MSR_IA32_ARCH_CAPABILITIES
arch/x86/kernel/cpu/common.c | 1 +
arch/x86/kvm/vmx/vmx.c | 44 +++++++++++++++++++++++-------------
arch/x86/kvm/x86.c | 16 +++++--------
arch/x86/kvm/x86.h | 1 +
4 files changed, 36 insertions(+), 26 deletions(-)
base-commit: b9846a698c9aff4eb2214a06ac83638ad098f33f
--
2.40.0
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