linux-kernel - Re: [PATCH] serial: sc16is7xx: improve comments about variants

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Message-Id: <20230525000848.6669e1cff93082144a5a8397@hugovil.com>
Date:   Thu, 25 May 2023 00:08:48 -0400
From:   Hugo Villeneuve <hugo@...ovil.com>
To:     Hugo Villeneuve <hugo@...ovil.com>
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jiri Slaby <jirislaby@...nel.org>,
        Hugo Villeneuve <hvilleneuve@...onoff.com>,
        linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] serial: sc16is7xx: improve comments about variants

On Wed, 17 May 2023 10:13:49 -0400
Hugo Villeneuve <hugo@...ovil.com> wrote:

> From: Hugo Villeneuve <hvilleneuve@...onoff.com>
> 
> Replace 740/750/760 with generic terms like 74x/75x/76x to account for
> variants like 741, 752 and 762.
> 
> Signed-off-by: Hugo Villeneuve <hvilleneuve@...onoff.com>
> ---
>  drivers/tty/serial/sc16is7xx.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
> index 5bd98e4316f5..00054bb49780 100644
> --- a/drivers/tty/serial/sc16is7xx.c
> +++ b/drivers/tty/serial/sc16is7xx.c
> @@ -223,7 +223,7 @@
>   * trigger levels. Trigger levels from 4 characters to 60 characters are
>   * available with a granularity of four.
>   *
> - * When the trigger level setting in TLR is zero, the SC16IS740/750/760 uses the
> + * When the trigger level setting in TLR is zero, the SC16IS74x/75x/76x uses the
>   * trigger level setting defined in FCR. If TLR has non-zero trigger level value
>   * the trigger level defined in FCR is discarded. This applies to both transmit
>   * FIFO and receive FIFO trigger level setting.
> @@ -234,7 +234,7 @@
>  #define SC16IS7XX_TLR_TX_TRIGGER(words)	((((words) / 4) & 0x0f) << 0)
>  #define SC16IS7XX_TLR_RX_TRIGGER(words)	((((words) / 4) & 0x0f) << 4)
>  
> -/* IOControl register bits (Only 750/760) */
> +/* IOControl register bits (Only 75x/76x) */
>  #define SC16IS7XX_IOCONTROL_LATCH_BIT	(1 << 0) /* Enable input latching */
>  #define SC16IS7XX_IOCONTROL_MODEM_BIT	(1 << 1) /* Enable GPIO[7:4] as modem pins */
>  #define SC16IS7XX_IOCONTROL_SRESET_BIT	(1 << 3) /* Software Reset */
> @@ -248,9 +248,9 @@
>  #define SC16IS7XX_EFCR_RTS_INVERT_BIT	(1 << 5) /* RTS output inversion */
>  #define SC16IS7XX_EFCR_IRDA_MODE_BIT	(1 << 7) /* IrDA mode
>  						  * 0 = rate upto 115.2 kbit/s
> -						  *   - Only 750/760
> +						  *   - Only 75x/76x
>  						  * 1 = rate upto 1.152 Mbit/s
> -						  *   - Only 760
> +						  *   - Only 76x
>  						  */
>  
>  /* EFR register bits */
> -- 
> 2.30.2

This patch is now integrated in the following series:
https://lkml.org/lkml/2023/5/25/7