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Message-ID: <20230525042257.merdqif6yuz6ukv4@ripper>
Date: Wed, 24 May 2023 21:22:57 -0700
From: Bjorn Andersson <andersson@...nel.org>
To: Rohit Agarwal <quic_rohiagar@...cinc.com>, bhelgaas@...gle.com,
lpieralisi@...nel.org
Cc: kw@...ux.com, agross@...nel.org, konrad.dybcio@...aro.org,
mani@...nel.org, robh@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
manivannan.sadhasivam@...aro.org, linux-arm-msm@...r.kernel.org,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 1/5] dt-bindings: PCI: qcom: Add SDX65 SoC
On Thu, May 18, 2023 at 11:17:49PM +0530, Rohit Agarwal wrote:
> Add PCIe EP compatible string for SDX65 SoC.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@...cinc.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Bjorn, Lorenzo, please pick this patch through the PCI tree (to avoid
any merge issues).
Thanks,
Bjorn
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> index b3c22eb..8111122 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> @@ -13,6 +13,7 @@ properties:
> compatible:
> enum:
> - qcom,sdx55-pcie-ep
> + - qcom,sdx65-pcie-ep
> - qcom,sm8450-pcie-ep
>
> reg:
> @@ -109,6 +110,7 @@ allOf:
> contains:
> enum:
> - qcom,sdx55-pcie-ep
> + - qcom,sdx65-pcie-ep
> then:
> properties:
> clocks:
> --
> 2.7.4
>
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