linux-kernel - [PATCH 3/5] dt-bindings: timer: microchip,sam9x60-pit64b: convert to yaml

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20230525125602.640855-4-claudiu.beznea@microchip.com>
Date:   Thu, 25 May 2023 15:56:00 +0300
From:   Claudiu Beznea <claudiu.beznea@...rochip.com>
To:     <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <nicolas.ferre@...rochip.com>,
        <alexandre.belloni@...tlin.com>, <daniel.lezcano@...aro.org>,
        <tglx@...utronix.de>, <wim@...ux-watchdog.org>,
        <linux@...ck-us.net>, <sebastian.reichel@...labora.com>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-watchdog@...r.kernel.org>,
        "Claudiu Beznea" <claudiu.beznea@...rochip.com>
Subject: [PATCH 3/5] dt-bindings: timer: microchip,sam9x60-pit64b: convert to yaml

Convert Microchip PIT64B to YAML. Along with it clock-names binding has
been added as the driver needs it to get PIT64B clocks.

Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
---
 .../devicetree/bindings/arm/atmel-sysregs.txt |  6 --
 .../timer/microchip,sam9x60-pit64b.yaml       | 56 +++++++++++++++++++
 2 files changed, 56 insertions(+), 6 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/microchip,sam9x60-pit64b.yaml

diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 7024839c5da2..54d3f586403e 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -4,12 +4,6 @@ Chipid required properties:
 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
 - reg : Should contain registers location and length
 
-PIT64B Timer required properties:
-- compatible: Should be "microchip,sam9x60-pit64b"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for PIT64B timer
-- clocks: Should contain the available clock sources for PIT64B timer.
-
 System Timer (ST) required properties:
 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
 - reg: Should contain registers location and length
diff --git a/Documentation/devicetree/bindings/timer/microchip,sam9x60-pit64b.yaml b/Documentation/devicetree/bindings/timer/microchip,sam9x60-pit64b.yaml
new file mode 100644
index 000000000000..9378eca38138
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/microchip,sam9x60-pit64b.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/microchip,sam9x60-pit64b.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip 64-bit Periodic Interval Timer (PIT64B)
+
+maintainers:
+  - Claudiu Beznea <claudiu.beznea@...rochip.com>
+
+description:
+  The 64-bit periodic interval timer provides the operating system scheduler
+  interrupt. It is designed to offer maximum accuracy and efficient management,
+  even for systems with long response times.
+
+properties:
+  compatible:
+    const: microchip,sam9x60-pit64b
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: pclk
+      - const: gclk
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/at91.h>
+
+    pit64b: timer@...28000 {
+        compatible = "microchip,sam9x60-pit64b";
+        reg = <0xf0028000 0x100>;
+        interrupts = <37 IRQ_TYPE_LEVEL_HIGH 7>;
+        clocks = <&pmc PMC_TYPE_PERIPHERAL 37>, <&pmc PMC_TYPE_GCK 37>;
+        clock-names = "pclk", "gclk";
+    };
+
+...
-- 
2.34.1