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Date:   Thu, 25 May 2023 10:05:39 -0400
From:   Hugo Villeneuve <hugo@...ovil.com>
To:     Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor+dt@...nel.org, Jiri Slaby <jirislaby@...nel.org>,
        jringle@...dpoint.com, tomasz.mon@...lingroup.com,
        l.perczak@...lintechnologies.com,
        linux-serial <linux-serial@...r.kernel.org>,
        devicetree@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>,
        linux-gpio@...r.kernel.org,
        Hugo Villeneuve <hvilleneuve@...onoff.com>
Subject: Re: [PATCH v3 04/11] serial: sc16is7xx: add post reset delay

On Thu, 25 May 2023 14:05:35 +0300 (EEST)
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com> wrote:

> On Thu, 25 May 2023, Hugo Villeneuve wrote:
> 
> > From: Hugo Villeneuve <hvilleneuve@...onoff.com>
> > 
> > Make sure we wait at least 3us before initiating communication with
> > the device after reset.
> > 
> > Signed-off-by: Hugo Villeneuve <hvilleneuve@...onoff.com>
> > ---
> >  drivers/tty/serial/sc16is7xx.c | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
> > index a7c4da3cfd2b..af7e66db54b4 100644
> > --- a/drivers/tty/serial/sc16is7xx.c
> > +++ b/drivers/tty/serial/sc16is7xx.c
> > @@ -1428,6 +1428,12 @@ static int sc16is7xx_probe(struct device *dev,
> >  	regmap_write(s->regmap, SC16IS7XX_IOCONTROL_REG << SC16IS7XX_REG_SHIFT,
> >  			SC16IS7XX_IOCONTROL_SRESET_BIT);
> >  
> > +	/*
> > +	 * After reset, the host must wait at least 3us before initializing a
> > +	 * communication with the device.
> > +	 */
> > +	usleep_range(3, 5);
> > +
> >  	for (i = 0; i < devtype->nr_uart; ++i) {
> >  		s->p[i].line		= i;
> >  		/* Initialize port data */
> 
> Does this fix a problem? You don't have a Fixes tag nor did you describe
> a problem that arises if the is not there in the changelog.

Not for the moment, that is why I didn't put a Fixes tag.

A potential problem that can arise is that on a much faster processor, there is a chance that we could reach the first instruction that request a read/write before the reset post-delay.

Hugo.

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