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Message-ID: <MN0PR12MB610106604F8ACC3C4C4B9749E2469@MN0PR12MB6101.namprd12.prod.outlook.com>
Date: Thu, 25 May 2023 14:21:42 +0000
From: "Limonciello, Mario" <Mario.Limonciello@....com>
To: Bjorn Helgaas <bhelgaas@...gle.com>
CC: Mika Westerberg <mika.westerberg@...ux.intel.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"S-k, Shyam-sundar" <Shyam-sundar.S-k@....com>,
"Natikar, Basavaraj" <Basavaraj.Natikar@....com>,
"Deucher, Alexander" <Alexander.Deucher@....com>,
"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
Lukas Wunner <lukas@...ner.de>,
Iain Lane <iain@...ngesquash.org.uk>,
"Rafael J. Wysocki" <rafael@...nel.org>
Subject: RE: [PATCH v4 2/2] PCI: Don't assume root ports from > 2015 are power
manageable
[AMD Official Use Only - General]
> -----Original Message-----
> From: Rafael J. Wysocki <rafael@...nel.org>
> Sent: Thursday, May 25, 2023 9:16 AM
> To: Limonciello, Mario <Mario.Limonciello@....com>
> Cc: Bjorn Helgaas <bhelgaas@...gle.com>; Mika Westerberg
> <mika.westerberg@...ux.intel.com>; Rafael J . Wysocki <rafael@...nel.org>;
> linux-pci@...r.kernel.org; linux-kernel@...r.kernel.org; S-k, Shyam-sundar
> <Shyam-sundar.S-k@....com>; Natikar, Basavaraj
> <Basavaraj.Natikar@....com>; Deucher, Alexander
> <Alexander.Deucher@....com>; linux-pm@...r.kernel.org; Lukas Wunner
> <lukas@...ner.de>; Iain Lane <iain@...ngesquash.org.uk>
> Subject: Re: [PATCH v4 2/2] PCI: Don't assume root ports from > 2015 are
> power manageable
>
> On Wed, May 24, 2023 at 9:07 PM Mario Limonciello
> <mario.limonciello@....com> wrote:
> >
> > Using a USB keyboard or mouse to wakeup the system from s2idle fails when
> > that XHCI device is connected to a USB-C port for an AMD USB4 router.
> >
> > Due to commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during
> suspend")
> > all PCIe ports go into D3 during s2idle.
> >
> > When specific root ports are put into D3 over s2idle on some AMD platforms
> > it is not possible for the platform to properly identify wakeup sources.
> > This happens whether the root port goes into D3hot or D3cold.
> >
> > Comparing registers between Linux and Windows 11 this behavior to put
> > these specific root ports into D3 at suspend is unique to Linux. On an
> > affected system Windows does not put those specific root ports into D3
> > over Modern Standby.
> >
> > Windows doesn't put the root ports into D3 because root ports are not
> > power manageable.
> >
> > Linux shouldn't assume root ports support D3 just because they're on a
> > machine newer than 2015, the ports should also be deemed power
> manageable.
> > Add an extra check explicitly for root ports to ensure D3 isn't selected
> > for these ports.
>
> "D3 isn't selected for them if they are not power-manageable through
> platform firmware." Or similar.
>
> With this addressed:
>
> Acked-by: Rafael J. Wysocki <rafael@...nel.org>
Thanks!
If no other oppositions, Bjorn, let me know if you want me to respin for
this or you can massage commit message yourself.
>
> >
> > Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
> > Reported-by: Iain Lane <iain@...ngesquash.org.uk>
> > Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-
> suspend-with-external-USB-keyboard/m-p/5217121
> > Signed-off-by: Mario Limonciello <mario.limonciello@....com>
> > ---
> > v3->v4:
> > * Move after refactor
> > ---
> > drivers/pci/pci.c | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> > index d1fa040bcea7..d293db963327 100644
> > --- a/drivers/pci/pci.c
> > +++ b/drivers/pci/pci.c
> > @@ -3015,6 +3015,14 @@ bool pci_bridge_d3_possible(struct pci_dev
> *bridge)
> > if (dmi_check_system(bridge_d3_blacklist))
> > return false;
> >
> > + /*
> > + * It's not safe to put root ports that don't support power
> > + * management into D3.
> > + */
> > + if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT &&
> > + !platform_pci_power_manageable(bridge))
> > + return false;
> > +
> > /*
> > * It should be safe to put PCIe ports from 2015 or newer
> > * to D3.
> > --
> > 2.34.1
> >
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