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Message-ID: <202305261236.NDPNwMNA-lkp@intel.com>
Date: Fri, 26 May 2023 13:00:08 +0800
From: kernel test robot <lkp@...el.com>
To: Hamza Mahfooz <hamza.mahfooz@....com>,
amd-gfx@...ts.freedesktop.org
Cc: oe-kbuild-all@...ts.linux.dev, Leo Li <sunpeng.li@....com>,
Kenny Ho <kenny.ho@....com>,
"Pan, Xinhui" <Xinhui.Pan@....com>,
Rodrigo Siqueira <Rodrigo.Siqueira@....com>,
linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
Hamza Mahfooz <hamza.mahfooz@....com>,
Alex Deucher <alexander.deucher@....com>,
Christian König <christian.koenig@....com>
Subject: Re: [PATCH v2] drm/amd/display: enable more strict compile checks
Hi Hamza,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on linus/master v6.4-rc3 next-20230525]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Hamza-Mahfooz/drm-amd-display-enable-more-strict-compile-checks/20230525-034537
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link: https://lore.kernel.org/r/20230524191955.252212-1-hamza.mahfooz%40amd.com
patch subject: [PATCH v2] drm/amd/display: enable more strict compile checks
config: x86_64-allyesconfig
compiler: gcc-11 (Debian 11.3.0-12) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/19bf85960032f3841215917e04659a6cc259dbcc
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Hamza-Mahfooz/drm-amd-display-enable-more-strict-compile-checks/20230525-034537
git checkout 19bf85960032f3841215917e04659a6cc259dbcc
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 olddefconfig
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202305261236.NDPNwMNA-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:67:
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:325:9: note: in expansion of macro 'link_regs'
325 | link_regs(0, A),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[0].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:325:9: note: in expansion of macro 'link_regs'
325 | link_regs(0, A),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:325:9: note: in expansion of macro 'link_regs'
325 | link_regs(0, A),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[0].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:325:9: note: in expansion of macro 'link_regs'
325 | link_regs(0, A),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:326:9: note: in expansion of macro 'link_regs'
326 | link_regs(1, B),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[1].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:326:9: note: in expansion of macro 'link_regs'
326 | link_regs(1, B),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:326:9: note: in expansion of macro 'link_regs'
326 | link_regs(1, B),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[1].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:326:9: note: in expansion of macro 'link_regs'
326 | link_regs(1, B),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:327:9: note: in expansion of macro 'link_regs'
327 | link_regs(2, C),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[2].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:327:9: note: in expansion of macro 'link_regs'
327 | link_regs(2, C),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:327:9: note: in expansion of macro 'link_regs'
327 | link_regs(2, C),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[2].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:327:9: note: in expansion of macro 'link_regs'
327 | link_regs(2, C),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:328:9: note: in expansion of macro 'link_regs'
328 | link_regs(3, D),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[3].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:328:9: note: in expansion of macro 'link_regs'
328 | link_regs(3, D),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:328:9: note: in expansion of macro 'link_regs'
328 | link_regs(3, D),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[3].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:328:9: note: in expansion of macro 'link_regs'
328 | link_regs(3, D),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:329:9: note: in expansion of macro 'link_regs'
329 | link_regs(4, E),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[4].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:329:9: note: in expansion of macro 'link_regs'
329 | link_regs(4, E),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:329:9: note: in expansion of macro 'link_regs'
329 | link_regs(4, E),
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[4].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:329:9: note: in expansion of macro 'link_regs'
329 | link_regs(4, E),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:330:9: note: in expansion of macro 'link_regs'
330 | link_regs(5, F)
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[5].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
207 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
238 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
320 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:330:9: note: in expansion of macro 'link_regs'
330 | link_regs(5, F)
| ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:330:9: note: in expansion of macro 'link_regs'
330 | link_regs(5, F)
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[5].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
321 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:330:9: note: in expansion of macro 'link_regs'
330 | link_regs(5, F)
| ^~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:70:
>> drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39978:111: error: initialized field overwritten [-Werror=override-init]
39978 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39978:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
39978 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:9: note: in expansion of macro 'LE_SF'
184 | LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:334:9: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
334 | LINK_ENCODER_MASK_SH_LIST_DCN20(__SHIFT),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39978:111: note: (near initialization for 'le_shift.TMDS_CTL0')
39978 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39978:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
39978 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:9: note: in expansion of macro 'LE_SF'
184 | LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:334:9: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
334 | LINK_ENCODER_MASK_SH_LIST_DCN20(__SHIFT),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39982:111: error: initialized field overwritten [-Werror=override-init]
39982 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK 0x00000001L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39982:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
39982 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK 0x00000001L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:9: note: in expansion of macro 'LE_SF'
184 | LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:339:9: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
339 | LINK_ENCODER_MASK_SH_LIST_DCN20(_MASK),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39982:111: note: (near initialization for 'le_mask.TMDS_CTL0')
39982 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK 0x00000001L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39982:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
39982 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK 0x00000001L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:9: note: in expansion of macro 'LE_SF'
184 | LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:339:9: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
339 | LINK_ENCODER_MASK_SH_LIST_DCN20(_MASK),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:67:
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:423:9: note: in expansion of macro 'tf_regs'
423 | tf_regs(0),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[0].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:423:9: note: in expansion of macro 'tf_regs'
423 | tf_regs(0),
| ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
183 | SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:423:9: note: in expansion of macro 'tf_regs'
423 | tf_regs(0),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[0].DSCL_MEM_PWR_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
183 | SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:423:9: note: in expansion of macro 'tf_regs'
423 | tf_regs(0),
| ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:424:9: note: in expansion of macro 'tf_regs'
424 | tf_regs(1),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[1].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:424:9: note: in expansion of macro 'tf_regs'
424 | tf_regs(1),
| ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
183 | SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:424:9: note: in expansion of macro 'tf_regs'
424 | tf_regs(1),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[1].DSCL_MEM_PWR_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
183 | SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:424:9: note: in expansion of macro 'tf_regs'
424 | tf_regs(1),
| ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:425:9: note: in expansion of macro 'tf_regs'
425 | tf_regs(2),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[2].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:425:9: note: in expansion of macro 'tf_regs'
425 | tf_regs(2),
| ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
183 | SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:425:9: note: in expansion of macro 'tf_regs'
425 | tf_regs(2),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[2].DSCL_MEM_PWR_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
183 | SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:425:9: note: in expansion of macro 'tf_regs'
425 | tf_regs(2),
| ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:426:9: note: in expansion of macro 'tf_regs'
426 | tf_regs(3),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[3].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:426:9: note: in expansion of macro 'tf_regs'
426 | tf_regs(3),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
183 | SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:426:9: note: in expansion of macro 'tf_regs'
426 | tf_regs(3),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[3].DSCL_MEM_PWR_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
183 | SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:426:9: note: in expansion of macro 'tf_regs'
426 | tf_regs(3),
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
129 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
136 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
418 | TF_REG_LIST_DCN20(id),\
..
vim +269 drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h
33934b3576b0ef Hawking Zhang 2019-03-04 266
33934b3576b0ef Hawking Zhang 2019-03-04 267 #define DCN_BASE__INST0_SEG0 0x00000012
33934b3576b0ef Hawking Zhang 2019-03-04 268 #define DCN_BASE__INST0_SEG1 0x000000C0
33934b3576b0ef Hawking Zhang 2019-03-04 @269 #define DCN_BASE__INST0_SEG2 0x000034C0
33934b3576b0ef Hawking Zhang 2019-03-04 270 #define DCN_BASE__INST0_SEG3 0x00009000
33934b3576b0ef Hawking Zhang 2019-03-04 271 #define DCN_BASE__INST0_SEG4 0
33934b3576b0ef Hawking Zhang 2019-03-04 272 #define DCN_BASE__INST0_SEG5 0
33934b3576b0ef Hawking Zhang 2019-03-04 273
--
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https://github.com/intel/lkp-tests/wiki
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