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Message-ID: <20230526133122.16443-6-quic_shazhuss@quicinc.com>
Date: Fri, 26 May 2023 19:01:21 +0530
From: Shazad Hussain <quic_shazhuss@...cinc.com>
To: <agross@...nel.org>, <andersson@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>
CC: <konrad.dybcio@...aro.org>,
Shazad Hussain <quic_shazhuss@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH v1 5/5] arm64: dts: qcom: sa8775p-ride: enable i2c11
This enables the i2c11 node on sa8775p-ride board for A2B controller
and audio port expander.
Signed-off-by: Shazad Hussain <quic_shazhuss@...cinc.com>
---
arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
index 4c000a5cb3c4..ab767cfa51ff 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
@@ -19,6 +19,7 @@
serial0 = &uart10;
serial1 = &uart12;
serial2 = &uart17;
+ i2c11 = &i2c11;
i2c18 = &i2c18;
spi16 = &spi16;
ufshc1 = &ufs_mem_hc;
@@ -260,6 +261,13 @@
};
};
+&i2c11 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&qup_i2c11_default>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&i2c18 {
clock-frequency = <400000>;
pinctrl-0 = <&qup_i2c18_default>;
@@ -370,6 +378,13 @@
bias-disable;
};
+ qup_i2c11_default: qup-i2c11-state {
+ pins = "gpio48", "gpio49";
+ function = "qup1_se4";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
qup_i2c18_default: qup-i2c18-state {
pins = "gpio95", "gpio96";
function = "qup2_se4";
--
2.17.1
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