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Message-ID: <1e75872c-f80f-0d29-3be0-25dc19452cc5@quicinc.com>
Date:   Fri, 26 May 2023 11:46:20 +0800
From:   Tao Zhang <quic_taozha@...cinc.com>
To:     Suzuki K Poulose <suzuki.poulose@....com>,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Konrad Dybcio <konradybcio@...il.com>,
        Mike Leach <mike.leach@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC:     Jinlong Mao <quic_jinlmao@...cinc.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        <coresight@...ts.linaro.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        Tingwei Zhang <quic_tingweiz@...cinc.com>,
        Yuanfang Zhang <quic_yuanfang@...cinc.com>,
        Trilok Soni <quic_tsoni@...cinc.com>,
        Hao Zhang <quic_hazha@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <andersson@...nel.org>
Subject: Re: [PATCH v4 03/11] coresight-tpdm: Initialize DSB subunit
 configuration


On 5/25/2023 5:09 PM, Suzuki K Poulose wrote:
> On 25/05/2023 09:12, Tao Zhang wrote:
>>
>> On 5/23/2023 9:42 PM, Suzuki K Poulose wrote:
>>> On 27/04/2023 10:00, Tao Zhang wrote:
>>>> DSB is used for monitoring “events”. Events are something that
>>>> occurs at some point in time. It could be a state decode, the
>>>> act of writing/reading a particular address, a FIFO being empty,
>>>> etc. This decoding of the event desired is done outside TPDM.
>>>> DSB subunit need to be configured in enablement and disablement.
>>>> A struct that specifics associated to dsb dataset is needed. It
>>>> saves the configuration and parameters of the dsb datasets. This
>>>> change is to add this struct and initialize the configuration of
>>>> DSB subunit.
>>>>
>>>> Signed-off-by: Tao Zhang <quic_taozha@...cinc.com>
>
> ...
>
>>>> + * dataset types. It covers Basic Counts(BC), Tenure Counts(TC),
>>>> + * Continuous Multi-Bit(CMB), Multi-lane CMB(MCMB) and Discrete 
>>>> Single
>>>> + * Bit(DSB). This function will initialize the configuration 
>>>> according
>>>> + * to the dataset type supported by the TPDM.
>>>> + */
>>>>   static void __tpdm_enable(struct tpdm_drvdata *drvdata)
>>>>   {
>>>>       CS_UNLOCK(drvdata->base);
>>>> @@ -110,15 +144,24 @@ static const struct coresight_ops tpdm_cs_ops 
>>>> = {
>>>>       .source_ops    = &tpdm_source_ops,
>>>>   };
>>>>   -static void tpdm_init_default_data(struct tpdm_drvdata *drvdata)
>>>> +static int tpdm_datasets_setup(struct tpdm_drvdata *drvdata)
>>>>   {
>>>>       u32 pidr;
>>>>   -    CS_UNLOCK(drvdata->base);
>>>>       /*  Get the datasets present on the TPDM. */
>>>>       pidr = readl_relaxed(drvdata->base + CORESIGHT_PERIPHIDR0);
>>>>       drvdata->datasets |= pidr & GENMASK(TPDM_DATASETS - 1, 0);
>>>> -    CS_LOCK(drvdata->base);
>>>
>>> Why are we removing the CS_{UN,}LOCK here ?
>>
>> CS_UNLOCK is used before writing data to Coresight registers. Here 
>> this function
>>
>> doesn't need to write data to any registers, so I remove the 
>> CS_{UN,}LOCK here.
>
> Please make this a separate patch to avoid confusing and keep it at the
> beginning of the series.
Sure, I will update this in the next patch series.
>
> Suzuki
>
> _______________________________________________
> CoreSight mailing list -- coresight@...ts.linaro.org
> To unsubscribe send an email to coresight-leave@...ts.linaro.org

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