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Message-Id: <20230529204258.65238-3-linux@fw-web.de>
Date: Mon, 29 May 2023 22:42:56 +0200
From: Frank Wunderlich <linux@...web.de>
To: linux-mediatek@...ts.infradead.org
Cc: Frank Wunderlich <frank-w@...lic-files.de>,
Jonathan Cameron <jic23@...nel.org>,
Lars-Peter Clausen <lars@...afoo.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
"Hui.Liu" <hui.liu@...iatek.com>,
Zhiyong Tao <zhiyong.tao@...iatek.com>,
Andrew-CT Chen <andrew-ct.chen@...iatek.com>,
Lala Lin <lala.lin@...iatek.com>, linux-iio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Daniel Golle <daniel@...rotopia.org>
Subject: [PATCH v2 2/4] arm64: dts: mt7986: add thermal and efuse
From: Daniel Golle <daniel@...rotopia.org>
Add thermal related nodes to mt7986 devicetree.
Signed-off-by: Daniel Golle <daniel@...rotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
---
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 37 ++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index aa9e679b78e2..a409d5e845c2 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -337,6 +337,15 @@ spi1: spi@...0b000 {
status = "disabled";
};
+ auxadc: adc@...0d000 {
+ compatible = "mediatek,mt7986-auxadc";
+ reg = <0 0x1100d000 0 0x1000>;
+ clocks = <&infracfg CLK_INFRA_ADC_26M_CK>;
+ clock-names = "main";
+ #io-channel-cells = <1>;
+ status = "disabled";
+ };
+
ssusb: usb@...00000 {
compatible = "mediatek,mt7986-xhci",
"mediatek,mtk-xhci";
@@ -375,6 +384,21 @@ mmc0: mmc@...30000 {
status = "disabled";
};
+ thermal: thermal@...0c800 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt7986-thermal";
+ reg = <0 0x1100c800 0 0x800>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg CLK_INFRA_THERM_CK>,
+ <&infracfg CLK_INFRA_ADC_26M_CK>,
+ <&infracfg CLK_INFRA_ADC_FRC_CK>;
+ clock-names = "therm", "auxadc", "adc_32k";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ nvmem-cells = <&thermal_calibration>;
+ nvmem-cell-names = "calibration-data";
+ };
+
pcie: pcie@...80000 {
compatible = "mediatek,mt7986-pcie",
"mediatek,mt8192-pcie";
@@ -426,6 +450,18 @@ pcie_port: pcie-phy@...00000 {
};
};
+ efuse: efuse@...00000 {
+ compatible = "mediatek,mt7986-efuse",
+ "mediatek,efuse";
+ reg = <0 0x11d00000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ thermal_calibration: calib@274 {
+ reg = <0x274 0xc>;
+ };
+ };
+
usb_phy: t-phy@...10000 {
compatible = "mediatek,mt7986-tphy",
"mediatek,generic-tphy-v2";
@@ -567,5 +603,4 @@ wifi: wifi@...00000 {
memory-region = <&wmcpu_emi>;
};
};
-
};
--
2.34.1
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