linux-kernel - Re: [PATCH v2 1/1] gpio-f7188x: fix base values conflicts with other gpio pins

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Date:   Tue, 30 May 2023 01:24:30 +0300
From:   andy.shevchenko@...il.com
To:     simon.guinot@...uanux.org
Cc:     Linus Walleij <linus.walleij@...aro.org>, xingtong_wu@....com,
        brgl@...ev.pl, linux-gpio@...r.kernel.org,
        linux-kernel@...r.kernel.org, henning.schild@...mens.com,
        xingtong.wu@...mens.com
Subject: Re: [PATCH v2 1/1] gpio-f7188x: fix base values conflicts with other
 gpio pins

Mon, May 29, 2023 at 03:54:36PM +0200, simon.guinot@...uanux.org kirjoitti:
> On Mon, May 29, 2023 at 03:03:28PM +0200, Linus Walleij wrote:
> > On Mon, May 29, 2023 at 2:27 PM <simon.guinot@...uanux.org> wrote:
> > 
> > > It would be nice if a pin number found in the device datasheet could
> > > still be converted into a Linux GPIO number by adding the base of the
> > > first bank.
> > 
> > We actively discourage this kind of mapping because of reasons stated
> > in drivers/gpio/TODO: we want dynamic number allocation to be the
> > norm.
> 
> Sure but it would be nice to have a dynamic base applied to a controller
> (and not to each chip of this controller), and to respect the interval
> between the chips (as stated in the controllers datasheets).

What you want is against the architecture. To fix this, you might change
the architecture of the driver to have one chip for the controller, but
it's quite questionable change. Also how can you guarantee ordering of
the enumeration? You probably need to *disable* SMP on the boot time.
This will still be fragile as long as GPIO chip can be unbound at run
time. Order can be changed.

So, the patch is good and the correct way to go.

P.S. The root cause is that hardware engineers and documentation writers
do not consider their hardware in the multi-tasking, multi-user general
purpose operating system, such as Linux. I believe the ideal fix is to fix the
documentation (datasheet).

-- 
With Best Regards,
Andy Shevchenko