[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <f4c04190-c90e-bf5f-f666-c979a7aee8ce@microchip.com>
Date: Mon, 29 May 2023 12:32:49 +0000
From: <Claudiu.Beznea@...rochip.com>
To: <Conor.Dooley@...rochip.com>
CC: <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <Nicolas.Ferre@...rochip.com>,
<alexandre.belloni@...tlin.com>, <daniel.lezcano@...aro.org>,
<tglx@...utronix.de>, <wim@...ux-watchdog.org>,
<linux@...ck-us.net>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-watchdog@...r.kernel.org>
Subject: Re: [PATCH v2 2/4] dt-bindings: timer: atmel,at91sam9260-pit: convert
to yaml
On 29.05.2023 15:17, Conor Dooley wrote:
> Hey Claudiu,
>
> On Mon, May 29, 2023 at 09:26:02AM +0300, Claudiu Beznea wrote:
>> Convert Microchip AT91 PIT bindings to YAML. Along with it clocks and
>> clock-names bindings were added as the drivers needs it to ensure proper
>> hardware functionality.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
>> ---
>> .../devicetree/bindings/arm/atmel-sysregs.txt | 12 ---
>> .../bindings/timer/atmel,at91sam9260-pit.yaml | 96 +++++++++++++++++++
>> 2 files changed, 96 insertions(+), 12 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> index 67a66bf74895..54d3f586403e 100644
>> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> @@ -4,18 +4,6 @@ Chipid required properties:
>> - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
>> - reg : Should contain registers location and length
>>
>> -PIT Timer required properties:
>> -- compatible: Should be "atmel,at91sam9260-pit"
>> -- reg: Should contain registers location and length
>> -- interrupts: Should contain interrupt for the PIT which is the IRQ line
>> - shared across all System Controller members.
>> -
>> -PIT64B Timer required properties:
>> -- compatible: Should be "microchip,sam9x60-pit64b"
>> -- reg: Should contain registers location and length
>> -- interrupts: Should contain interrupt for PIT64B timer
>> -- clocks: Should contain the available clock sources for PIT64B timer.
>> -
>> System Timer (ST) required properties:
>> - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
>> - reg: Should contain registers location and length
>> diff --git a/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
>> new file mode 100644
>> index 000000000000..1cc7b7494e4b
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
>> @@ -0,0 +1,96 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/timer/atmel,at91sam9260-pit.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Microchip AT91 Periodic Interval Timer (PIT)
>> +
>> +maintainers:
>> + - Claudiu Beznea <claudiu.beznea@...rochip.com>
>> +
>> +description:
>> + Microchip AT91 periodic interval timer provides the operating system scheduler
>> + interrupt. It is designed to offer maximum accuracy and efficient management,
>> + even for systems with long response time.
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - atmel,at91sam9260-pit
>> + - microchip,sam9x60-pit64b
>
> The missing compatible should probably be added here, rather than
> removed from the devicetree.
>
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + interrupts:
>> + maxItems: 1
>> +
>> + clocks:
>> + minItems: 1
>> + maxItems: 2
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - interrupts
>> + - clocks
>> +
>> +allOf:
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: atmel,at91sam9260-pit
>> + then:
>> + properties:
>
>> + interrupts:
>> + description:
>> + Contain interrupt for the PIT which is the IRQ line shared across all
>> + System Controller members.
>
> I think you should drop this & the corresponding section below, since
> both PIT and PIT64 have a single interrupt.
OK. Just wanted to emphasize with this that in case of PIT the interrupt
may be shared with other IPs.
>
> Thanks,
> Conor.
>
>> + clocks:
>> + maxItems: 1
>> +
>> + else:
>> + properties:
>> + interrupts:
>> + description:
>> + PIT64B peripheral interrupt identifier.
>> + clocks:
>> + minItems: 2
>> + clock-names:
>> + items:
>> + - const: pclk
>> + - const: gclk
>> + required:
>> + - clock-names
>
Powered by blists - more mailing lists