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Message-Id: <20230529033710.4098568-2-peng.fan@oss.nxp.com>
Date: Mon, 29 May 2023 11:37:10 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: shawnguo@...nel.org, s.hauer@...gutronix.de
Cc: kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Peng Fan <peng.fan@....com>
Subject: [PATCH V4 2/2] soc: imx: support i.MX93 soc device
From: Peng Fan <peng.fan@....com>
i.MX93 Device Unique ID(UID) is in eFuse that could be read through
OCOTP Fuse Shadow Block. i.MX93 UID is 128 bits long.
The overall logic is similar as i.MX8M, so reuse soc-imx8m driver
for i.MX93.
Signed-off-by: Peng Fan <peng.fan@....com>
---
V4:
With patch 1 included, the soc_uid_h moved to patch 1
V3:
Update commit log
Drop uneeded {}
V2:
The ocotp yaml has got R-b from DT maintainer
drivers/soc/imx/Makefile | 2 +-
drivers/soc/imx/soc-imx8m.c | 57 ++++++++++++++++++++++++++++++++++++-
2 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index a28c44a1f16a..83aff181ae51 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -7,5 +7,5 @@ obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8m-blk-ctrl.o
obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8mp-blk-ctrl.o
-obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o
+obj-$(CONFIG_SOC_IMX9) += soc-imx8m.o imx93-src.o imx93-pd.o
obj-$(CONFIG_IMX9_BLK_CTRL) += imx93-blk-ctrl.o
diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c
index be26bbdac9fa..cca207b90110 100644
--- a/drivers/soc/imx/soc-imx8m.c
+++ b/drivers/soc/imx/soc-imx8m.c
@@ -26,8 +26,11 @@
#define IMX8MP_OCOTP_UID_OFFSET 0x10
#define IMX8MP_OCOTP_UID_HIGH 0xE00
+#define IMX93_OCOTP_UID_OFFSET 0x80c0
+
/* Same as ANADIG_DIGPROG_IMX7D */
#define ANADIG_DIGPROG_IMX8MM 0x800
+#define ANADIG_DIGPROG_IMX93 0x800
struct imx8_soc_data {
char *name;
@@ -149,6 +152,53 @@ static u32 __init imx8mm_soc_revision(void)
return rev;
}
+static void __init imx93_soc_uid(void)
+{
+ void __iomem *ocotp_base;
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx93-ocotp");
+ if (!np)
+ return;
+
+ ocotp_base = of_iomap(np, 0);
+ WARN_ON(!ocotp_base);
+
+ soc_uid = readl_relaxed(ocotp_base + IMX93_OCOTP_UID_OFFSET + 0x8);
+ soc_uid <<= 32;
+ soc_uid |= readl_relaxed(ocotp_base + IMX93_OCOTP_UID_OFFSET + 0xC);
+
+ soc_uid_h = readl_relaxed(ocotp_base + IMX93_OCOTP_UID_OFFSET + 0x0);
+ soc_uid_h <<= 32;
+ soc_uid_h |= readl_relaxed(ocotp_base + IMX93_OCOTP_UID_OFFSET + 0x4);
+
+ iounmap(ocotp_base);
+ of_node_put(np);
+}
+
+static u32 __init imx93_soc_revision(void)
+{
+ struct device_node *np;
+ void __iomem *anatop_base;
+ u32 rev;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx93-anatop");
+ if (!np)
+ return 0;
+
+ anatop_base = of_iomap(np, 0);
+ WARN_ON(!anatop_base);
+
+ rev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX93);
+
+ iounmap(anatop_base);
+ of_node_put(np);
+
+ imx93_soc_uid();
+
+ return rev;
+}
+
static const struct imx8_soc_data imx8mq_soc_data = {
.name = "i.MX8MQ",
.soc_revision = imx8mq_soc_revision,
@@ -169,11 +219,17 @@ static const struct imx8_soc_data imx8mp_soc_data = {
.soc_revision = imx8mm_soc_revision,
};
+static const struct imx8_soc_data imx93_soc_data = {
+ .name = "i.MX93",
+ .soc_revision = imx93_soc_revision,
+};
+
static __maybe_unused const struct of_device_id imx8_soc_match[] = {
{ .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, },
{ .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, },
{ .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, },
{ .compatible = "fsl,imx8mp", .data = &imx8mp_soc_data, },
+ { .compatible = "fsl,imx93", .data = &imx93_soc_data, },
{ }
};
@@ -225,7 +281,6 @@ static int __init imx8_soc_init(void)
soc_uid_h, soc_uid);
else
soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
-
if (!soc_dev_attr->serial_number) {
ret = -ENOMEM;
goto free_rev;
--
2.37.1
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