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Message-ID: <bdbc4e15-3cd9-ae93-fff7-6e323035c1d2@gmail.com>
Date: Mon, 29 May 2023 15:54:56 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
Cc: p.zabel@...gutronix.de, airlied@...il.com, daniel@...ll.ch,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
jassisinghbrar@...il.com, chunfeng.yun@...iatek.com,
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xinlei.lee@...iatek.com, houlong.wei@...iatek.com,
dri-devel@...ts.freedesktop.org,
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~postmarketos/upstreaming@...ts.sr.ht
Subject: Re: [PATCH 16/27] arm64: dts: mediatek: mt6795: Add support for the
CMDQ/GCE mailbox
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
> In preparation for adding multimedia blocks, add the CMDQ/GCE mailbox.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Applied, thanks
> ---
> arch/arm64/boot/dts/mediatek/mt6795.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> index 090400d7fd61..99cc4918e6ba 100644
> --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> @@ -7,6 +7,7 @@
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/mediatek,mt6795-clk.h>
> +#include <dt-bindings/gce/mediatek,mt6795-gce.h>
> #include <dt-bindings/pinctrl/mt6795-pinfunc.h>
> #include <dt-bindings/power/mt6795-power.h>
> #include <dt-bindings/reset/mediatek,mt6795-resets.h>
> @@ -401,6 +402,15 @@ fhctl: clock-controller@...09f00 {
> status = "disabled";
> };
>
> + gce: mailbox@...12000 {
> + compatible = "mediatek,mt6795-gce", "mediatek,mt8173-gce";
> + reg = <0 0x10212000 0 0x1000>;
> + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&infracfg CLK_INFRA_GCE>;
> + clock-names = "gce";
> + #mbox-cells = <2>;
> + };
> +
> gic: interrupt-controller@...21000 {
> compatible = "arm,gic-400";
> #interrupt-cells = <3>;
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