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Message-ID: <95bf627c-8bb4-bc11-79fd-f299e21f1530@kunbus.com>
Date: Tue, 30 May 2023 15:58:01 +0200
From: Lino Sanfilippo <l.sanfilippo@...bus.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Pavel Machek <pavel@...x.de>
Cc: stable@...r.kernel.org, patches@...ts.linux.dev,
linux-kernel@...r.kernel.org, torvalds@...ux-foundation.org,
akpm@...ux-foundation.org, linux@...ck-us.net, shuah@...nel.org,
patches@...nelci.org, lkft-triage@...ts.linaro.org,
jonathanh@...dia.com, f.fainelli@...il.com,
sudipm.mukherjee@...il.com, srw@...dewatkins.net, rwarsow@....de,
jarkko@...nel.org, Lukas Wunner <lukas@...ner.de>,
Philipp Rosenberger <p.rosenberger@...bus.com>
Subject: Re: Wrong/strange TPM patches was Re: [PATCH 6.1 000/119] 6.1.31-rc1
review
Hi,
On 30.05.23 15:02, Greg Kroah-Hartman wrote:
> ATTENTION: This e-mail is from an external sender. Please check attachments and links before opening e.g. with mouseover.
>
>
> On Tue, May 30, 2023 at 12:46:49PM +0200, Pavel Machek wrote:
>> Hi!
>>
>>> This is the start of the stable review cycle for the 6.1.31 release.
>>> There are 119 patches in this series, all will be posted as a response
>>> to this one. If anyone has any issues with these being applied, please
>>> let me know.
>>
>>> Lino Sanfilippo <l.sanfilippo@...bus.com>
>>> tpm, tpm_tis: Avoid cache incoherency in test for interrupts
>>
>> Description on this one is wrong/confused. There's no cache problem in
>> the code. Plus test_bit and friend already use bit number, so
>>
>> - bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
>> + bool itpm = test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
>>
>> @@ -87,6 +87,7 @@ enum tpm_tis_flags {
>> TPM_TIS_ITPM_WORKAROUND = BIT(0),
>> TPM_TIS_INVALID_STATUS = BIT(1),
>> TPM_TIS_DEFAULT_CANCELLATION = BIT(2),
>> + TPM_TIS_IRQ_TESTED = BIT(3),
>> };
>>
>> this enum needs to go from BIT() to raw numbers.
>>
>> You can just do return tpm_pm_resume();
>>
>>> Jarkko Sakkinen <jarkko@...nel.org>
>>> tpm: Prevent hwrng from activating during resume
>>
>> @@ -429,6 +431,14 @@ int tpm_pm_resume(struct device *dev)
>> if (chip == NULL)
>> return -ENODEV;
>>
>> + chip->flags &= ~TPM_CHIP_FLAG_SUSPENDED;
>> +
>> + /*
>> + * Guarantee that SUSPENDED is written last, so that hwrng does not
>> + * activate before the chip has been fully resumed.
>> + */
>> + wmb();
>> +
>> return 0;
>> }
>> EXPORT_SYMBOL_GPL(tpm_pm_resume);
>>
>> This code is confused. First, either you don't need memory barriers
>> here, or you need real locking. Second, if you want to guarantee flags
>> are written last, you need to put the barrier before the
>> assignment. (But ... get rid of that confusion, first).
>
> Care to submit patches to resolve this? It's this way in Linus's tree
> now from what I can tell, and these changes were needed for another
> stable-marked change, so I'll leave them in for now.
>
First, thanks for the review Pavel and for spotting this.
I will send a patch to fix the enums.
Regards,
Lino
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