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Message-ID: <ZHZKriRXoh9gHpWg@gerhold.net>
Date: Tue, 30 May 2023 21:12:46 +0200
From: Stephan Gerhold <stephan@...hold.net>
To: Luca Weiss <luca@...tu.xyz>
Cc: ~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Krishna Manikandan <quic_mkrishn@...cinc.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 7/7] ARM: dts: qcom: msm8226: Add mdss nodes
On Tue, May 30, 2023 at 08:24:17PM +0200, Luca Weiss wrote:
> Add the nodes that describe the mdss so that display can work on
> MSM8226.
>
> Signed-off-by: Luca Weiss <luca@...tu.xyz>
Can you update this to use labels like in [1]? See inline below.
This will allow proper grouping of the labels in the board DT.
Thanks,
Stephan
[1]: https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git/commit/?h=for-next&id=835f939501769253eb7eb2dc5389b8592a63a3ed
> ---
> arch/arm/boot/dts/qcom-msm8226.dtsi | 127 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 127 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
> index 42acb9ddb8cc..c794f5ece1d1 100644
> --- a/arch/arm/boot/dts/qcom-msm8226.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
> @@ -636,6 +636,133 @@ smd-edge {
> label = "lpass";
> };
> };
> +
> + mdss: display-subsystem@...00000 {
> + compatible = "qcom,mdss";
> + reg = <0xfd900000 0x100>, <0xfd924000 0x1000>;
> + reg-names = "mdss_phys", "vbif_phys";
> +
> + power-domains = <&mmcc MDSS_GDSC>;
> +
> + clocks = <&mmcc MDSS_AHB_CLK>,
> + <&mmcc MDSS_AXI_CLK>,
> + <&mmcc MDSS_VSYNC_CLK>;
> + clock-names = "iface",
> + "bus",
> + "vsync";
> +
> + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + status = "disabled";
> +
> + mdp: display-controller@...00000 {
mdss_mdp:
> + compatible = "qcom,msm8226-mdp5", "qcom,mdp5";
> + reg = <0xfd900100 0x22000>;
> + reg-names = "mdp_phys";
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <0>;
> +
> + clocks = <&mmcc MDSS_AHB_CLK>,
> + <&mmcc MDSS_AXI_CLK>,
> + <&mmcc MDSS_MDP_CLK>,
> + <&mmcc MDSS_VSYNC_CLK>;
> + clock-names = "iface",
> + "bus",
> + "core",
> + "vsync";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + mdp5_intf1_out: endpoint {
mdss_mdp_intf1_out:
> + remote-endpoint = <&dsi0_in>;
> + };
> + };
> + };
> + };
> +
> + dsi0: dsi@...22800 {
mdss_dsi0:
> + compatible = "qcom,msm8226-dsi-ctrl",
> + "qcom,mdss-dsi-ctrl";
> + reg = <0xfd922800 0x1f8>;
> + reg-names = "dsi_ctrl";
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <4>;
> +
> + assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
> + <&mmcc PCLK0_CLK_SRC>;
> + assigned-clock-parents = <&dsi_phy0 0>,
> + <&dsi_phy0 1>;
> +
> + clocks = <&mmcc MDSS_MDP_CLK>,
> + <&mmcc MDSS_AHB_CLK>,
> + <&mmcc MDSS_AXI_CLK>,
> + <&mmcc MDSS_BYTE0_CLK>,
> + <&mmcc MDSS_PCLK0_CLK>,
> + <&mmcc MDSS_ESC0_CLK>,
> + <&mmcc MMSS_MISC_AHB_CLK>;
> + clock-names = "mdp_core",
> + "iface",
> + "bus",
> + "byte",
> + "pixel",
> + "core",
> + "core_mmss";
> +
> + phys = <&dsi_phy0>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi0_in: endpoint {
mdss_dsi0_in:
> + remote-endpoint = <&mdp5_intf1_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dsi0_out: endpoint {
mdss_dsi0_out:
> + };
> + };
> + };
> + };
> +
> + dsi_phy0: phy@...22a00 {
mdss_dsi0_phy:
> + compatible = "qcom,dsi-phy-28nm-8226";
> + reg = <0xfd922a00 0xd4>,
> + <0xfd922b00 0x280>,
> + <0xfd922d80 0x30>;
> + reg-names = "dsi_pll",
> + "dsi_phy",
> + "dsi_phy_regulator";
> +
> + #clock-cells = <1>;
> + #phy-cells = <0>;
> +
> + clocks = <&mmcc MDSS_AHB_CLK>,
> + <&rpmcc RPM_SMD_XO_CLK_SRC>;
> + clock-names = "iface",
> + "ref";
> + };
> + };
> };
>
> timer {
>
> --
> 2.40.1
>
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